The x3, multi-level cell (MLC) NAND technology is based on a 34-nm process, enabling 32-gigabit chips for use in flash cards, USB drives and other products. But don't look for solid-state drives (SSDs) based on the x3 technology for some time due to endurance issues. And the other question is whether the memory controllers are ready for x3.

Today's x3 announcement was somewhat expected. As reported in June, Micron quietly dropped hints about plans to produce 3-bit-per-cell technology in the fourth quarter, according to an analyst from Gartner Inc. The Intel-Micron duo are also talking about a 2x-nm part, based on 2-bit-per-cell, according to the analyst. Intel and Micron have a joint NAND manufacturing venture, dubbed IM Flash Technologies LLC.

In other words, the 3-bit-per-cell NAND race is heating up. "There is a horse race (to show) who can produce the first 3-bit-per-cell'' on a sub-40-nm process, said Jim Handy, an analyst with Objective-Analysis, a research firm.

NAND parts based on an x3 scheme ''lowers the cost,'' Handy said. "Anyone who has 3-bit-per-cell has the potential to become more profitable'' than their rivals.

''Flash memory has been available for the last few years with single level cells having one bit of storage per cell (SLC) and 2-bits per cell multilevel cell (MLC),'' according to a report from Gerson Lehrman Group (GLG).

''3-bit per cell technology requires no change in the basic design of flash memory from a manufacturing viewpoint, only in the architecture and controller side. Thus the cost reductions per bit can be significant using 3-bits per cell (maybe 50 percent or greater cost reduction are possible),'' according to the report.

That's a key in NAND, which has been hit hard by a memory downturn. In x3, SanDisk Corp. last year expected to start mass production of the world's first commercial x3 NAND flash memory. The technology, which was a 56-nm device, was co-developed by its memory partner, Toshiba Corp.

Earlier this year, SanDisk and Toshiba presented papers on x3 and 4-bit-per-cell (x4) NAND flash memory. The companies then shipped three-bit-per-cell NAND, based on 43-nm technology.

Toshiba is reportedly struggling in the arena. Due to poor quality issues for x3 controllers, Toshiba is unable to sell much of its x3 NAND production, according to an analyst at Lazard Capital Markets.

Despite the issues, SanDisk and Toshiba recently announced a 32-Gbit, x3 device, based on sub-35-nm CMOS technology. Toshiba also fabricated the world's first 64-Gbit chip that applies x4 at the 43-nm process generation.

For some time, there were also rumors that the Intel-Micron duo, Hynix and Samsung were separately jumping into the x3 NAND game. Now, the Intel-Micron duo have made it official.