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Power DesignLine Blog
Content posted in January 2005
Saving energy
Power DesignLine Blog  
1/25/2005   Post a comment
The California Energy Commission (CEC) opened a Rulemaking Proceeding to consider amendments to its current Appliance Efficiency Regulations. Know what your designs need to meet?
Backwards to the future?
Power DesignLine Blog  
1/24/2005   Post a comment
Dr. Frank says that it is inevitable that designs will run out of materials improvements that can be cost-effectively integrated into the manufacturing process, which means we will run out of ways to keep logic voltages from decreasing in proportion to device size. This has some strange implications such as the smallest transistors may not be the most power efficient. What to do?
The switch mode efficiency challenge
Power DesignLine Blog  
1/20/2005   Post a comment
National Semiconductor's Paul Greenland talks about how an IC manufacturer can increase efficiency in a switch mode power supply in his latest blog.
Saving the Universe
Power DesignLine Blog  
1/13/2005   Post a comment
Dr. Frank takes us on a journey from the evolution of technology into the distant future, and talks about what life will be like in dozens, hundreds, or billions of years. Is energy finite? Will technology become stagnant? What can we do? Is there hope? He takes us through all these questions and brings us back safely. Good food for thought.
LEDs are Everywhere
Power DesignLine Blog  
1/13/2005   Post a comment
Light emitting diodes were once almost exclusively used as status indicators on circuit boards or control panels. Green was "good," red was "bad." Today LEDs are everywhere. The real question to consider is what new emerging technologies and control schemes will be used to drive these new applications.
How much Moore?
Power DesignLine Blog  
1/6/2005   Post a comment
It's 2005 and blogger extraordinaire Dr. Michael Frank, gazes into his crystal ball and sees a new crop of product and process announcements. He pays homage to Gordon Moore saying "chalk up another success to the Moore-meister," if Intel meets its newest target for the Montecito processor. But, are we ready to move from CMOS processes? None of the candidate post-CMOS technologies seem to be on track to become an economically viable solution. Still, Dr Frank says there are reasons for hope.
The State of World Power
Power DesignLine Blog  
1/3/2005   Post a comment
I must share with you some research information that came across my desk recently from Databeans on the state of power ICs and power management. It just reinforces the raison d'etre of this Power Management DesignLine site and the need for current information and in-depth articles.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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