Day 4: Application Topics of S-Parameters
EE Times University 1/23/2014 71 comments
- Rational expansion of the S-parameter - why do it, how
- Selecting a VNA, features and function relevant to signal integrity
- Third-party tools we use in our S-parameter measurement flow
- Compliance application - 10G-KR, 10 Gbit/s backplane analysis, what is involved
Day 3: What Constitutes a 'Good' VNA Measurement?
EE Times University 1/22/2014 88 comments
- Calibration validation scope
- How device under test impacts your measurement error
- Tips and approaches for dealing with bad calibrations
- Measurement work flow - the process of good S-parameter measurement
- Exploiting device geometries and relating them to the S-parameter matrix
- Simple passivity and causality checks using Matlab
- Why fixing a slightly bad measurement is really just very bad
- Calibration approaches and validation methods
- Overview of calibration approaches - SOLT, TRL, LRM,
- Symmetrical calibrations
- A novel measure-based de-embedding approach
- What is de-embedding and how is different than calibration?
- Simple de-embedding approaches and potential pitfalls
Day 2: What Is a VNA & How Does It Work?
EE Times University 1/21/2014 164 comments
- Structure of a VNA, block diagrams and function
- Reference plane and error box concept
- Anatomy of a SOLT calibration
- Overview of mechanical and electronic calibrations, dispelling some popular misconceptions
Day 1: What Is an S-Parameter?
EE Times University 1/20/2014 139 comments
- Review of basic S-parameter theory
- Intuitive interpretation of S-parameters
- Vector relationship of S11 on S21
- What is a decent S11 versus a max frequency of interest?
- Establishing port definitions cleanly for RF versus 3D EM/Signal Integrity
- Transforming S-parameters into the time domain - primer of problems, things to look out for
Session 5 - Introduction to Graphics Processing (Hands-On Workshop)
EE Times University 12/13/2013 472 comments
The capabilities of microcontrollers have been steadily improving over the last few years as applications have demanded more functionality and features. More and more electronic devices are relying on a display to provide users with options and a way to interact in real-time. Traditionally, graphics and touch interfaces have proven to be complex interfaces that only a few elite can understand. This session will explore the graphics processing capabilities of the SM32F4 and how easy it is to get up and running with your own graphical user interfaces.
- Introduction to graphics processing
- Graphics peripheral
- Graphics toolchain
Session 4 - Digital Signal Processing With the STM32F4 (Hands-On Workshop)
EE Times University 12/12/2013 288 comments
While we live in an analog world, microcontrollers only have the ability to process digitized information. Analog signals are sampled at discrete times, often requiring high-speed digital signal processing to ensure appropriate conditions. This session will explore the digital signal processing capabilities of the STM32F4 and how they can be implemented in real-world applications.
- Introduction to DSP
- DSP features
- DSP instructions
- Floating point
- DSP example
Session 3 - An Overview of the STM32F4 Discovery Board (Hands-On Workshop)
EE Times University 12/11/2013 360 comments
The STM32F4 is a cutting-edge ARM Cortex-M4 processor weighing in with 2 MB of flash, 64 Mb of SDRAM, a 180 MHz clock, and a peripheral set to make any engineer drool. This session will introduce the STM32 F4 Discovery development kit including its features, development environment, and how to get it up and running.
- Overview of the STM32F4
- The ST family of microcontrollers
- Peripheral set
- Low power modes
- Onboard sensors
- Toolchain setup
Session 2 - Selecting the Right Microcontroller*
EE Times University 12/3/2013 638 comments
Designing an embedded system is often considered to be more art than science. Selecting the right microcontroller for the job is absolutely critical to ensure proper operation of the system. This session will explore tips and tricks for selecting the right microcontroller, ensuring that development gets up and running on the right foot. *Please note the first 1,000 qualified attendees (located in the United States & Canada) will receive a Free STM32F429 Discovery Board for the hands-on workshop Days 3-5.
- 10 Steps to Selecting a microcontroller
- What to look for in a development kit
- Tool setup lab
Session 1 - Introduction to Microcontrollers*
EE Times University 12/2/2013 596 comments
Each day our lives become more connected and integrated with electronic devices than the day before. At the heart of nearly all these electronic devices is a microcontroller ‒ but what makes up a modern day microcontroller? This session will introduce some of the parts that make up a microcontroller and how they are being used to make our world smarter. *Please note the first 1,000 qualified attendees (located in the United States & Canada) will receive a Free STM32F429 Discovery Board for the hands-on workshop Days 3-5.
- Introduction to microcontrollers
- Common microcontroller architectures
Part III: Total Jitter & Eye Width
EE Times University 9/11/2013 82 comments
- In search of peak-to-peak jitter
- Total jitter at a bit error ratio
- The dual-Dirac Model
- Combining component jitter to estimate system jitter
- Measuring and estimating TJ(BER)
Part V: Case Study
EE Times University 8/23/2013 83 comments
In this final class, we will consider how a modification in the supply chain can change the way an industrial system is designed, deployed, and maintained. Specifically, we will take a look at the industrial embedded computer business of Dell’s OEM division and how a change in infrastructure can impact the whole industry.
Part IV: Getting Lost in the Data
EE Times University 8/22/2013 120 comments
With so much data becoming available, it can affect the way systems are designed and software is written. In this class we will look at some of the tradeoffs among compressing, encrypting, and transmitting data across a network, particularly in systems where power is a scarce resource.
Part III: Security
EE Times University 8/21/2013 113 comments
As sensors become distributed and data is collected from diverse sources, the systems become more vulnerable to attack. What can be done to ensure that both the data and the integrity of the system remain secure from internal and external attacks? In this segment we will look at both hardware and software techniques to secure the system.
Part II: Consolidation
EE Times University 8/20/2013 125 comments
In this class we will look at what is happening in the compute centers and, in particular, technologies such as multicore and virtualization. Consolidation enables more efficient computing, centralized management, integrated data management, and visualization, as well as enabling new types of applications and automation in industrial systems.
Part I: Introduction: Pervasive Change
EE Times University 8/19/2013 181 comments
In this class we will look at the broad scope of the changes happening in many segments of the industry, including the cloud, autonomous cars, factory automation, the smart grid, and others. It will look at the ways embedded systems are changing and what is meant by "intelligent" systems. We will identify the major pieces of these systems and some of the issues they create.
Part III: Bluetooth
EE Times University 1/16/2013 224 comments
Today's lecture will cover the evolution of Bluetooth, including Bluetooth 3.0 and 4.0; give an overview the Bluetooth protocol and standards; and examine the capabilities of available devices.
Introduction: Understanding the Different Flavors of IEEE 802.11
EE Times University 1/14/2013 389 comments
Attendees will come away from this EE Times University track with an understanding of the alphabet soup of 802.11 specifications, as well as a brief history of the technology. They'll also learn about mainstream chipsets and reference designs and what's due to emerge in the near future.
Part V. Advanced Concepts & Future Trends
EE Times University 12/14/2012 325 comments
This final session will cover a wide range of topics, including high-speed serial interconnect, optical interconnect, programmable analog fabric, 3D All Programmable chip technologies, and tools and techniques for creating radiation tolerant All Programmable designs.
Part IV. Programming, Debugging, Verifying & Protecting Designs
EE Times University 12/13/2012 132 comments
In this session, you will discover the various ways in which a design may be loaded into an All Programmable FPGA and/or SoC. Also discussed will be various debugging and verification techniques, along with ways to protect your designs from copying, cloning, overproduction, and other forms of attack.
Part III. Design Tools and Methodologies
EE Times University 12/12/2012 248 comments
In this session, you will learn about the various tools and techniques that may be used to capture All Programmable FPGA and SoC designs. These range from textual descriptions to graphical entry mechanisms, and from hand-coding to high-level synthesis (HLS).
Part II. Understanding the Role of Hardware Description Languages (HDLs)
EE Times University 12/11/2012 382 comments
In this session, you will be introduced to a number of hardware description languages (HDLs), including Verilog, VHDL, SystemVerilog, and SystemC. The differences between HDLs and traditional programming languages like C/C++ will be discussed, along with the difference in hardware-centric versus software-centric design flows.
Part I. Introduction: The Basics & Benefits of All Programmable Devices
EE Times University 12/10/2012 570 comments
In this session, you will learn about the fundamental lookup table (LUT)-based programmable fabric, along with more sophisticated architectures featuring memory blocks, DSP blocks, and hard and soft processor cores. The various technologies used to create different types of programmable devices -- including antifuse, Flash, and SRAM-based devices -- will be discussed, along with their advantages and disadvantages. Also discussed will be the benefit inherent in using All Programmable Devices, as opposed to traditional integrated circuits whose functions are "frozen in silicon."
Part V: Case Study: Highlighting a Successful Design Example
EE Times University 11/30/2012 123 comments
Putting it all together is where the rubber meets the road in any embedded effort. We'll delve into a successful design project, which showcases how engineers at an energy company put to practical use the intelligent concepts discussed in this course to create a noteworthy application.
Part III: Rethinking Embedding Processing: The Bridge to Ivy Bridge
EE Times University 11/28/2012 210 comments
Traditional embedded solutions have drawn from a disparate range of CPU solutions. Emerging, next-gen intelligent apps by definition require a minimum of 32-bits for optimum functionality. We'll dive into the architecture and features of one such family, the third-generation Intel Core vPro Processors, which include multiple x86-64 cores and embedded security.