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Programmable Logic DesignLine Blog
Content posted in September 2009
Mayan calendar predicts demise of Moore's Law
Programmable Logic DesignLine Blog  
9/30/2009   2 comments
Many have unsuccessfully predicted the end of Moore's Law. But what about predictions made before the law even existed?
Yet another FPGA startup
Programmable Logic DesignLine Blog  
9/15/2009   1 comment
A recent EE Times article revealed yet another FPGA startup, NuPGA.
An event like no other
Programmable Logic DesignLine Blog  
9/9/2009   Post a comment
On Sept. 16, EE Times will present a virtual conference on designing next-generation SoCs that promises to explore the challenges faced by developers of both ASIC- and FPGA-based SoCs.


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What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.

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