Awesome! Two amazing books for free! Blog 11/30/2010 14 comments Did you see my reviews of the books uC/OS-III The Real-Time Kernel by Jean Labrosse and uC/TCP-IP by Christian Légaré? Well, I just heard how you can get FREE copies of both these works…
The 450-mm development dilemma Blog 11/30/2010 3 comments The semiconductor capital equipment industry has still not recouped $14 billion in investment in 300-mm wafer processing technology and is not prepared to develop 450-mm tools.
ESL, FPGAs, and configurability Blog 11/29/2010 1 comment Here’s a taxonomy for ESL and FPGAs that will hopefully prevent definitions from becoming as word- distorted and confused as they have become in so many other areas of EDA.
From RTL to GDSII in Just Six Weeks! Blog 11/29/2010 37 comments The amazing story of how one man single-handedly invented a new computing architecture, designed a multi-million-gate SoC, and went from RTL to GDSII tapeout in just six weeks.
Debug: More return for less clicks Blog 11/29/2010 6 comments The tremendous growth of the semiconductor industry over the past 40 years is in part attributed to advancements of the EDA industry that caters to chip design companies. Although most design steps have been automated, a significant aspect that still remains primitive is that of RTL debugging.
The evolution of design methodology Blog 11/24/2010 8 comments In nature, long periods of relatively stable environments are occasionally punctuated by large-scale changes that are the catalyst for evolution to create a large variety of mutations, and then for natural selection to weed out the unsuccessful ones. The environment in which design methodology lives is similar.
Your duck is dead Blog 11/22/2010 5 comments Sometimes there’s a joke that’s so bad it’s good (if you see what I mean). This one is an oldie that’s made the rounds, but it still makes me grin…
IP in FPGAs: Blessing and a curse Blog 11/22/2010 12 comments With the IP-SoC 2010 event next week in Grenoble, we see FPGAs finally getting some kind of exposure. But, Dave Orecchio of GateRocket indicates that FPGA designers need to be aware of the unique nuances of using IP in these programmable platforms, and put in place tools and methodologies to overcome the IP use obstacles to success.
Sanmina-SCI aims for transparent interconnects Blog 11/18/2010 3 comments An executive at Sanmina-SCI recently demonstrated to me that every aspect of the electronics industry all the way down to the printed circuit board. is wagged by two heads, user expectations and economic feasibility.
Technology waits for no one and nothing Blog 11/18/2010 2 comments Referring to the lyrics of "Time Waits for No One", co-written by Keith Richards and Mick Jagger of the Rolling Stones, Bob Smith of Magma explains that, in the world of electronics, technology waits for no one, especially IC developers or EDA suppliers.
Real men have fabs…or do they? Blog 11/17/2010 10 comments Jerry Sanders' famous quote from the early days of the foundry industry is rightly mocked today, but a slightly modified (and more politically correct) version may still be applicable.
The Emperor of Ice-Cream Blog 11/16/2010 5 comments I just ran across a poem called The Emperor of Ice-Cream (it’s the author’s hyphen, not mine). If it hadn’t been explained to me I wouldn’t have a clue what it was about. Once you do know what it’s about, however, re-reading it really makes you think…
*Footprint Graphics* or *Land Patterns*? Blog 11/16/2010 9 comments OK, I know I’m supposed to spend my days pondering the imponderables pertaining to programmable logic, but FPGAs end up on circuit boards, and I just ran into a problem with regard to PCB terminology…
Check out EDA startups on EE Times' Silicon 60 list! Blog 11/15/2010 Post a comment The EE Times List of 60 Emerging Startups has been updated to Version 11.0. Do not wait and find out whose EDA companies have been added to the list, replacing others that either fell by the wayside or matured gracefully to bigger and better things.
How digital signage works Blog 11/13/2010 Post a comment Henry Davis considers how improvements in electronics hardware technology and software have improved the capabilities of the traditional signage application and added creative new opportunities in the digital signage market.
How complex is your chip design? Blog 11/6/2010 Post a comment When planning new IC design projects, such as SoCs or complex analog or RF chips, R&D organizations that have a firm grasp on the complexity of implementing the design wield a powerful competitive advantage.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.