In-house layout goes the way of home-grown EDA
Blog 4/12/2013 9 comments
Jack Harding, CEO of eSilicon, argues that the end to in-house IC layout may be in sight. The knowledge and manpower required to address the complexity of the task makes it an appropriate case for separation from logical design.
, due to the complexity, learning curve, peak-load labor requirements and alternative use of manpower required for it.
EDA/IP weekly roundup – April 3rd 2013
Blog 4/3/2013 Post a comment
Accellera, ARM, Asset, Digital Core, EDAC, FishTail, Gartner, GlobalFoundries, ProPlus, Silicon Labs, TSMC and Xilinx made the lineup today. See here for their news…