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Content tagged with Industrial Control Designline posted in November 1998
Verisity adds spec-based verification
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11/30/1998   Post a comment
Verisity Design Inc. has added temporal language support to its Specman test-bench development software, embracing a new methodology it calls "spec-based verification." The company's Specman Elite brings some of the advantages of formal model checking into a familiar simulation environment.
India hosts VLSI design conference
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11/23/1998   Post a comment
A number of high-level speakers will address current topics in chip design at the 12th annual Conference on VLSI Design, scheduled at this resort location January 7-10, 1999. While the conference has been held in India on an annual basis, this year's selection of speakers and topics is especially notable, organizers said.
STM tosses DSP core into cell-phone fray
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11/20/1998   Post a comment
STMicroelectronics is preparing a major thrust into mobile phones with a fixed-point DSP core that's expected to support three instruction sets, including a 128-bit very long instruction word format.
IMEC may license design-flow tool to CoWare
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11/20/1998   Post a comment
CoWare Inc. is in discussions to license and take to market technology within the "Ocapi" design flow from the Interuniversities Microelectronics Center (IMEC). CoWare (Santa Clara, Calif.) was spun out of IMEC in 1996 to market the N2C hardware-software codesign technology, which was originally developed at IMEC.
Mitsubishi preps 0.18-micron embedded DRAM process
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11/17/1998   Post a comment
Mitsubishi Electric Corp. will soon be accepting customers for its 0.18-micron technology, which brings embedded DRAM to new density levels and helps define the company's system-on-a-chip development strategy.
Price war besets Japan's young system-on-a-chip market
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11/13/1998   Post a comment
Just as companies in Japan appear to be making headway in system-on-a-chip design, a price war has erupted among silicon vendors as an expanding field of players vies for a finite number of opportunities.
Electronica: PowerPC licensing deal opens options to core users
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11/12/1998   Post a comment
The licensing deal between IBM Microelectronics and Mentor Graphics Corp. involving PowerPC cores puts a new twist into the intellectual property (IP) publishing business by giving designers a far wider range of manufacturing options than currently exist for high-end embedded microprocessor cores.
Xemics adds 16-bit DSP to Cool cores
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11/11/1998   Post a comment
Xemics SA (Neuchatel, Switzerland) has reached agreement with DSP Group Inc. (Santa Clara, Calif.) to apply its 0.25-micron CooLib low-power library technology to DSP Group's Teak 16-bit fixed-point DSP core.
Chip makers stress software solutions
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11/10/1998   Post a comment
The maturing global semiconductor industry will increasingly rely on software for systems design as process technology peters out, top European semiconductor executives said Tuesday (Nov. 10) at an industry forum here.
PowerPC picked for Mentor core library
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11/9/1998   Post a comment
IBM has licensed the PowerPC 401 and 405 microprocessor cores to Mentor Graphics Corp. for Mentor's Inventra libraries, the companies will jointly announce on Monday (Nov. 9). The partners tout the deal as the first time a 32-bit core will be available through an independent intellectual-property provider. It also marks Mentor's first serious microprocessor offerings through its two-year-old cores program.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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