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Content tagged with Industrial Control Designline posted in July 2002
ICS posts fiscal 4Q gains, but down year-over-year
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7/30/2002   Post a comment
Integrated Circuit Systems today reported it increased its profits by cutting costs and migrating to higher margin digital consumer products.
Securing WLAN Links: Part 3
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7/30/2002   Post a comment
There's no escaping that WEP is a problem for WLAN designers. In the final part of this series, we'll layout some technology solutions that can help designers enhance security in WLAN systems.
Infineon joins AMD, UMC in nanometer process effort
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7/30/2002   Post a comment
Infineon Technologies today joined a codevelopment between chip maker AMD and pure-play foundry UMC for 65nm and 45nm process technology using 300mm wafers.
Scaling Optical Modules to 40-Gb Speeds
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7/29/2002   Post a comment
The call for 4X or 10X speed increases in datacom designs forces optical module manufacturers to evaluate new process technologies, better manage signal integrity, and account for imperfect performance in the existing fiber plant.
Relaxed rules proposed for early 65-nm processes
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7/25/2002   Post a comment
Chip designers planning to scale their system-on-chip designs to the 65-nanometer process technology node by the middle of the decade were given fair warning at Semicon West this past week: Steering past delays in lithography, interconnects and other elements crucial to extending Moore's Law will require some tricky navigation.
Tracking power supply makes split rails from single line
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7/24/2002   Post a comment
This Maxim circuit generates the bipolar voltages required in many industrial analog applications, as well as contrast-control voltages for an LCD.
Rendering hair and fur needs computer graphics muscle
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7/24/2002   Post a comment
Before they became a checklist item for SoC designs, RAMDACs would convert digital RGB values to a value that lit a CRT phosphor dot - and the rendering engine came up with each RGB value was equivalent to a time-share on a Cray supercomputer. The times have changed, says this computer graphics authority, all the work is done by a single chip - cheap enough to power a kid's gaming machine. Here's how it works. . . using hair and fur as an example.
Steering Your Way Through Net Processor Architectures
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7/24/2002   Post a comment
There are a flurry of 10-Gbps network processors on the market today. Here's a guide to steer your way through these architectures, so you can pick the best one for your networking system design.
The Complexities of Designing Compilers for Protocol Stacks
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7/24/2002   Post a comment
Communication protocols, used to differentiate and to introduce new features into end products, require several attributes, including reusability, portability, and reliability. Novilit's Vladimir Novikov discusses the complex job of designing compilers for communication-protocol stacks.
Securing WLAN Links: Part 2
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7/23/2002   Post a comment
The 802.11 specification has some clear authentication discrepancies that create security headaches for WLAN design engineers. In Part 2 of this series, we'll examine the 802.11 authentication mechanisms and the security problems they provide.
Testable SoCs
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7/18/2002   Post a comment
Lattice to acquire 10Gbits/s serdes developer
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7/15/2002   Post a comment
Lattice Semiconductor said it will pay $23 million in stock to acquire Cerdelinx Technologies, a developer of OC-192 serdes chips.
Intelligent platform management interface gives network builders control
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7/15/2002   Post a comment
Sometimes you have to give up some control to gain control. Sound contradictory? It's really not. For example, initially, CompactPCI systems adhering to the PICMG 2.0 (PCI Industrial Computer Manufacturing Group) standard typically utilized the PCI bus to control and manage card slots.
VXS offers switched serial fabric path
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7/15/2002   Post a comment
Bused embedded compute platforms based on VMEbus and CompactPCI have served the industry well and have built up extensive ecosystems of complementary and competing products.
Optics primed for box-level solutions
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7/15/2002   Post a comment
Most of today's optical technologies are used to connect network end points outside the box over relatively long distances.
Firmware-friendly reset design
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7/12/2002   Post a comment
Standards Work Focuses on Transparent Operation Over IP
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7/11/2002   Post a comment
Over the past few years, ITU Study Group 16 has made big strides on the standards front to promote the delivery of multimedia services over IP networks. Here's an update on some of the key developments coming from this organization.
Eye scan saves time with multi-channel signal-integrity measurements
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7/11/2002   Post a comment
An eye scan mode enhances the functionality of a logic analyzer, making it behave like analog oscilloscope. This capability brings an interesting new design and verification tool to developers of high-speed multiple-bus designs. Aligent's Art Porter shows how.
Real data cuts timing mumbo-jumbo for cascaded PLL designs
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7/10/2002   Post a comment
PLLs provide the designer with the luxury of re-timing late or early clocks, eliminating the propagation delays that occur when clocks are transported over long distances. But typically there is noise and degradation - jitter - with each PLL in the chain, says this Cypress clocking expert. Here is an excellent example of timing budget measurements that can reduce the impact of noise in your system.
USB 2.0 Multi-TT Hubs Outperform Single-TT Hubs
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7/10/2002   Post a comment
Since the adoption of the 2.0 specification, USB is quickly emerging as a main way to link portable devices. But to be successful, designers should turn to multi-transaction translators in hub architectures.
I/O buffer timing ensures board Signal Integrity
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7/9/2002   Post a comment
As the speed of modern high-performance buses increases to 400 MHz and beyond, signal integrity concerns have a large and increasing effect on timing closure.
VSIA guidelines assist SoC Signal Integrity
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7/9/2002   Post a comment
Authors and integrators of intellectual property (IP) are trying to tape out chips without real verification of chip-level signal integrity matters. EDA solutions are complex and inadequate, with capacity-limited extraction tools that run out of steam well before system-on-chip (SoC) design sizes are met.
Multiple linear regulators power handheld devices
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7/9/2002   Post a comment
Wireless handsets, personal digital assistants (PDA) and other handheld devices can't operate everything directly from the battery since each IC requires a specific, steady and accurate supply voltage.
Satisfying cell phone-PDA combo devices' need for multiple voltages
News & Analysis  
7/8/2002   Post a comment
EE Times did not have room to print all the material we collected for its July 8th power management section - a contributed article package devoted to the engineering issues associated with extending battery life in merged cell phones and PDAs. Planet Analog is proud to present all the tutorial essays and graphics collected for that issue - starting with this outstanding analysis of voltage requirements by Fairchild's Ren Rossetti.
Efficient GMSK Modulator Targets GSM Designs
News & Analysis  
7/8/2002   1 comment
New modulator takes advantage of the inherent symmetry of the Gaussian filter to generate a baseband-modulated signal using a look-up table.
The Switch Fabric Multiservice Dilemma
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7/2/2002   Post a comment
To meet the demands of MSPP designers, fabric architectures must equally handle multiple traffic schemes. The answer lies in new interfaces, enhanced queuing techniques, and more.
OC-48 SONET receiver consumes significantly less logic in FPGA
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7/1/2002   Post a comment
n many Sonet processing applications, a commercial vendor application-specific IC (ASIC) or application-specific standard product (ASSP) implements basic Sonet functions such as framing and performance monitoring. Frequently, a field-programmable gate array (FPGA) is also required to interface to the ASIC and perform customer-specific functions.
IP core implements flexible network services on FPGAs
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7/1/2002   Post a comment
Next generation routers are providing solutions to service providers who need to introduce new revenue generating services while ensuring service quality.
FPGAs adapt security functions in security blade design
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7/1/2002   Post a comment
s networking makes greater strides, the need for security becomes increasingly paramount. However, even with rapid advances in networking technology, security lags behind and in most instances, is only assigned to virtual private networks (VPNs) and firewalls.


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