Upgraded FPGA design tool boosts logic performance by 15% Product News 6/1/2005 Post a comment The PlanAhead design and analysis tool that supports Virtex-4 platform and Spartan-3 FPGA families has been upgraded with several new features that enable engineers to find and fix problems even earlier in the design process than previous versions. The PlanAhead 7.1 tool's enhancements include metric maps, gate-level floor planning, an intuitive user interface, and improved accuracy of timing analysis.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.