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posted in July 2007
Humans deal computer a loss in poker challenge
News & Analysis  
7/26/2007   Post a comment
Humans win, bots loose the world's First Man-Machine Poker Championship ,which pitted two poker masters against a computer program called Polaris at the Association for the Advancement of Artificial Intelligence (AAAI) conference in Vancouver.
FPGA-based hardware acceleration of C/C++ based applications - Part 1
Design How-To  
7/25/2007   2 comments
Steve Casselman from DRC Computer Corp. explains how to accelerate C-based applications by running parallelized code on configurable processors.
The Road to Challenge X: Part 3 - verification testing, validation, and control strategy
Design How-To  
7/20/2007   Post a comment
Challenge X EXCLUSIVE: Ohio State University design team relies on Model-Based Design tools and determination in a four-year hybrid power train development effort.
How to enable Microsoft Office and Visio for RTL design
Design How-To  
7/18/2007   Post a comment
This tutorial describes how typical design teams employ Office tools to fortify their environment (structural RTL design, design documentation, and design reviews).
The Road to Challenge X: Part 2 - design and simulations
Design How-To  
7/18/2007   Post a comment
Challenge X EXCLUSIVE: Ohio State University design team relies on Model-Based Design tools and determination in a four-year hybrid power train development effort.
Intel debuts Solaris telecom servers
News & Analysis  
7/16/2007   Post a comment
Intel Corp. is offering Solaris 10 as an alternative operating system for both its rackmounted TIGW1U servers and the NetStructure line of ATCA blades.
Is anyone still using assembly language? You betcha! (Part 2)
Design How-To  
7/14/2007   Post a comment
Ongoing feedback from readers of Programmable Logic DesignLine describing who is using assembly language, why they are using it, and for what purposes.
The Road to Challenge X: Part 1 - the task and power train selection
Design How-To  
7/13/2007   Post a comment
Challenge X EXCLUSIVE: Ohio State University design team relies on Model-Based Design tools and determination in a four-year hybrid power train development effort.
Advansus rolls out mini-ITX board for multimedia networking apps
Product News  
7/12/2007   Post a comment
Advansus has introduced the i915GV2-LEI mini-ITX motherboard, which is based Intel Corp.'s low-power mobile Pentium M processors and 915GV system chipset with low Thermal Design Power (TDP).
IP paces automotive electronics innovation
Design How-To  
7/5/2007   Post a comment
Car makers and their electronics suppliers face a formidable array of new standards driven by demand for better fuel economy, environmental concerns, and safety. Such standards ensure interoperability across the supplier base.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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