19 Views of Hot Chips
Slideshow 8/26/2016 1 comment
Machine learning, self-driving cars and novel sensors commanded significant attention at this year’s Hot Chips, reflecting a semiconductor industry moving fast in many directions.
Power9 Opens IBM to Partners
News & Analysis 8/24/2016 3 comments
IBM’s Power9 processor reaches out to new OEMs and partners with multiple interconnects and variants of the chip, according to a talk at Hot Chips.
19 Views of IDF16
Slideshow 8/19/2016 Post a comment
This year’s Intel Developer Forum showed how the x86 giant is seeking ways to pump up and go beyond the PC with new platforms for machine vision, virtual reality, robots, drones and more.
14 Views from the Flash Summit
Slideshow 8/12/2016 11 comments
The Flash Memory Summit showed shifts NAND flash and other persistent memories including 3D XPoint are making in arrays, accelerators and solid-state drives.
Intel a Bear on PCs, a Bull on Flash
News & Analysis 7/20/2016 1 comment
Amid second-quarter results, Intel said it expects a double-digit PC decline this year but sees flash picking up as it continues a 14nm rollout and starts a 10nm ramp.
10 Ways To Program Your FPGA
Slideshow 6/10/2016 20 comments
A space-science engineer lists 10 languages and programs for programming field-programmable gate arrays (FPGAs), some tried and true, some brand new.
Accelerators Unite ARM, IBM, X86
News & Analysis 5/23/2016 2 comments
Seven chip companies will define a cache-coherent interface between accelerators and server processors spanning ARM, IBM Power and x86 architectures.
Data Centers Hit the Accelerator
News & Analysis 4/15/2016 12 comments
Engineers need to re-invent the server to better handle emerging jobs such as machine learning, said an executive with Microsoft’s cloud computing group.
Google Preps for IBM, ARM Shift
Slideshow 4/7/2016 3 comments
Google has ported much of its data center code to IBM Power and ARM server architectures and will co-design a server on the upcoming Power9 chip which will sport 24 cores and a new interconnect.
Friday Quiz: Powering FGPAs
Blog 3/11/2016 1 comment
Power is an important consideration then designing FPGAs into your systems. Learn about FPGAs and their power issues at ESC Boston 2016.
Facebook Likes Intel's 3D XPoint
Slideshow 3/10/2016 7 comments
Facebook endorsed Intel’s 3D XPoint memories and got Google to join its Open Compute Project at its annual event that included new processors from Intel and networking code from Microsoft.
Red Hat Drives FPGAs, ARM Servers
News & Analysis 2/12/2016 3 comments
Red Hat’s chief ARM architect is rallying FPGA makers to set a software standard for accelerators in between trying to get ARM servers ready for the market.
Google's Deep Learning Comes to Movidius
News & Analysis 1/27/2016 Post a comment
Google will buy Movidius vision processing chips and license the entire Movidius software development environment. Google's goal is to expand its machine intelligence technology beyond the data center, by bringing it to mobile devices.
FPGA Interfaces Speeding Up
Blog 11/16/2015 16 comments
IBM and Xilinx have joined the race to bring FPGA accelerators to data centers. The problem they and their competitors have yet to solve is delivering an easy-to-use standard interface for them, according to a Red Hat executive.
Dell Preps Semi-Custom Servers
News & Analysis 10/22/2015 Post a comment
Dell unveiled new servers for the data center market and enterprise at its annual DellWorld conference, targeting custom and semi-custom network infrastructure and storage for tier two cloud providers and others.
Xilinx Revenues Driven By Data
News & Analysis 10/14/2015 Post a comment
Xilinx's second quarter fiscal 2016 sales were down 4% from the prior quarter and down 13% year-over-year, but Xilinx's CEO put emphasis on its data-center future.
Intel Rides Servers, Flash in Q3
News & Analysis 10/13/2015 2 comments
Intel today reported third quarter revenue of $14.5 billion, a 10% increase from the second quarter of 2015, and flat year-over-year. Growth in its data center, non-volatile memory, and Internet of Things businesses offset lower client revenue.
Put FPGAs In Your SoCs
News & Analysis 10/2/2015 5 comments
Flex Logix has a new type of FPGA that nearly doubles the number of usable gates per chip. The FPGAs eliminate more than 20% of the room needed for interconnect and switches, and now have nearly 50% more room for gates.
8+ Horizons at Hot Chips
Slideshow 9/1/2015 Post a comment
The chip horizon is bright and diverse said speakers at Hot Chips presenting on 5G cellular, neural networks, molecular diagnostics, chip stacks and FPGAs.
Should Altera Worry About Intel's M&A Record?
News & Analysis 8/17/2015 13 comments
Altera’s fate after its pending acquisition by Intel is anybody’s guess. But the big worry is if Intel squashes Altera -- pushing newly acquired talent, products and technologies into oblivion as though they had never existed.
The History of Jitter
Blog 7/27/2015 2 comments
Jitter, that pesky little timing error in high-speed serial links, has a history that longer than billions of unit intervals.
Chip Stacks at 30,000 Feet
Blog 6/22/2015 2 comments
A chance encounter on a plane with Nvidia’s Jen-Hsun Huang shed just a little light on the road to chip stacks as Moore’s Law slows.
Smart Glasses Strap On AR
News & Analysis 6/10/2015 Post a comment
Emerging technologies like AR comes with a series of challenges and opportunities, executives from smart glasses and AR device companies said during a session. Still, as additional use cases develop the possibilities are endless.
Synthesis Engine Boasts 10X RTL Design Productivity
News & Analysis 6/8/2015 Post a comment
The Cadence Genus Synthesis Solution is the EDA company's next-generation register-transfer level (RTL) synthesis and physical synthesis engine, incorporating a multi-level massively parallel architecture that is claimed to deliver up to 5X faster synthesis turnaround times while scaling linearly beyond 10M instances.
Intel, Altera: Math in Question
News & Analysis 6/1/2015 34 comments
Analysts said Intel and FPGA vendor Altera will see benefits from their $16.7 billion merger, but question the math and assumptions behind the deal.
SoC RTL Signoff: Divide & Conquer with Abstract Models
Blog 6/1/2015 Post a comment
One of the fastest, easiest, and most effective methods to detect and remove bugs early in the design phase, is to run lint checks on the RTL. Besides coding guidelines, these tools catch issues related to simulation, synthesis, and place & route. A robust lint methodology reduces long and costly iterations between RTL design and downstream verification and implementation.