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Content tagged with FPGA/PLD/CPLD
posted in January 2013
Developing FPGA applications for Edition 2 of the IEC 61508 Safety Standard
Design How-To  
1/25/2013   Post a comment
FPGAs are increasingly being used in safety-critical domains. Advancements in design methodologies and tools help achieve the requirements of the IEC 61508 Edition 2 safety standard with a smooth design flow.
Altera's results, forecast disappoint
Design How-To  
1/24/2013   Post a comment
Executives say first quarter should be bottom of down sales cycle, but analysts thinks it could take longer.
Xilinx Zynq-7000 All Programmable SoC wins Microprocessor Report Analyst Choice Award
News & Analysis  
1/21/2013   Post a comment
Zynq-7000 All Programmable SoC recognized for being first to market and opening new opportunities for designers.
Xilinx buoyed by strong new products sales
Design How-To  
1/18/2013   Post a comment
Quarterly sales beat analysts' estimates, but profit tumbles at FPGA vendor.
Top 10 Microcontroller Articles of 2012
Design How-To  
1/16/2013   4 comments
Here are the Top 10 most-viewed microcontroller-related articles from 2012, including "How To" design articles, news items, product pieces, and commentary offerings.
DesignCon 2013 keeps the focus on memory
Design How-To  
1/14/2013   1 comment
Key presentations include a DDR4 forum and papers on LPDDR3 implementations.
DesignCon SMEs: Tough Path to 25G+ High-Speed Signals
News & Analysis  
1/11/2013   5 comments
A hornet's nest of issues -- crosstalk, loss, and noise -- are challenges on the road to 40G and beyond.
Plunify, net-based FPGA design startup, gains funds
Design How-To  
1/4/2013   Post a comment
Startup company Plunify has gained funding from Singapore to continue development of its Internet-based FPGA design software platforms.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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