DSP Meets FPGA: Is Massive Parallelism Enough? Design How-To 11/25/2003 Post a comment The wireless communications technology explosion came at a near-perfect time for FPGA companies with access to leading-edge fabrication technology. Reductions in FPGA feature size to 0.18 micron and below made more gates available as well as less expensive on a per-gate basis. Tighter geometries also gave significant performance boost. Lower operating voltages made the chips less power hungry. But is massive parallelism enough? Jack Shandle takes a look at the advantages and disadvantages of DSP
NASA's Orion Flight Software Production Systems Manager Darrel G. Raines joins Planet Analog Editor Steve Taranovich and Embedded.com Editor Max Maxfield to talk about embedded flight software used in Orion Spacecraft, part of NASA's Mars mission. Live radio show and live chat. Get your questions ready.
Brought to you by