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posted in December 2006
Xilinx ships industry's largest 65-nm FPGA
Product News  
12/29/2006   Post a comment
Xilinx started to ship the LX330, a 65-nm FPGA that is said to deliver 65% more logic than the largest 90-nm device. Xilinx fab partners UMC and Toshiba have quickly ramped 65-nm production, producing excellent yields that have enabled the chip vendor to deliver the complete 65-nm Virtex-5 LX platform on time and over one year ahead of its competition.
Top auto electronics stories of 2006
Design How-To  
12/29/2006   Post a comment
From cosmic rays damaging electronics to the FlexRay protocol's impact on auto safety, here are the stories electronic engineers thought were tops for the year.
QuickLogic provides power comparison resource package
Product News  
12/27/2006   Post a comment
Demo platform, whitepaper, and microsite compares leading low power programmable logic from QuickLogic, Xilinx, Altera, and Lattice Semiconductor.
Tutorial: Linear Feedback Shift Registers (LFSRs) - Part 2
Design How-To  
12/27/2006   Post a comment
In which we discover how to access the LFSR's previous value, how to cycle through 2^n values (instead of 2^n - 1), and how LFSRs may be of interest for FIFO applications.
Multi-threaded design tackles SoC performance bottlenecks: Part 2
Design How-To  
12/27/2006   Post a comment
Coupling processor operation closely to bus and other computational demands leads to a dramatic increase in automotive vision system processor efficiency. With further tuning, optimizing the bus to work closely with the hardware threads improves performance and provides a more controllable, measurable, and predictable system latency.
Board packs two Virtex-4 FPGAs, four C6416 DSPs
Product News  
12/22/2006   Post a comment
The SignalMaster Quad Virtex-4 aids development and testing of DSP algorithms, and can be programmed directly from MATLAB and Simulink.
Multi-threaded design tackles SoC performance bottlenecks: Part 1
Design How-To  
12/22/2006   Post a comment
Multi-threading processor core tackles both the CPU efficiency and the bus latency bottlenecks in driver-assistance/vision/navigation system SoC design.
Top DSP How-To's of 2006
Design How-To  
12/21/2006   Post a comment
Want to know what your peers are reading? Here is a run-down of the most popular articles of 2006. (New listings posted Dec. 21.)
Tutorial: Linear Feedback Shift Registers (LFSRs) - Part 1
Design How-To  
12/20/2006   4 comments
With an LFSR, the output from a standard shift register is fed back into its input in such a way as to cause the function to endlessly cycle through a sequence of patterns.
Analysis: PicoChip defies the odds
Design How-To  
12/20/2006   Post a comment
BDTI explains how PicoChip's architecture works, and how this architecture helped the company succeed where other massively parallel processor vendors failed.
Lattice and ANAGRAM provide crystal clear audio solutions
Product News  
12/20/2006   Post a comment
ANAGRAM Technologies has optimized its audio DAC and digital audio amplifier IP cores for Lattice's LatticeECP, LatticeECP2, and LatticeECP2M FPGAs.
Sarance Technologies delivers Interlaken protocol IP core for Xilinx Virtex-5 FPGAs
Product News  
12/20/2006   Post a comment
Interlaken protocol IP core from Sarance Technologies implements next generation high-speed serial chip-to-chip packet interface in Xilinx Virtex-5 FPGAs.
Comparators top list of top 10 IC growth products
News & Analysis  
12/20/2006   Post a comment
Comparators, chips used to measure two different voltages, will be the fastest growing semiconductor product segment in 2006, with projected growth of 37 percent, according to estimates by market research analyst firm IC Insights.
Cefriel joins the Lattice LEADER design services program
News & Analysis  
12/15/2006   Post a comment
Lattice's global network of premier design services companies welcomes ICT center of excellence Cefriel, which is developing a LVDS-PCIe (PCI Express) interface.
Altera Ships Production-Qualified Stratix II GX FPGAs
Product News  
12/15/2006   Post a comment
Stratix II GX FPGAs for high-speed interconnect protocols such as PCI Express, CEI-6G, serial digital interface (SDI), Gigabit Ethernet, Serial RapidIO (SRIO), XAUI, SerialLite II, Fibre Channel, and SONET/SDH.
Analysis: Altera Boosts DSP Capabilities with Stratix III FPGAs
Design How-To  
12/14/2006   Post a comment
BDTI explains how architectural enhancements and migration to a 65 nm process boost the Stratix III's impressive DSP capabilities.
Logic 101 - Part 4 - Gray Codes
Design How-To  
12/14/2006   Post a comment
In order to prevent multiple bits transitioning simultaneously, you can use a Gray code to ensure that only a single bit transitions at a time.
Tutorial: Floating-point arithmetic on FPGAs
Design How-To  
12/13/2006   1 comment
This article explains the basics of floating-point arithmetic, how floating-point units (FPUs) work, and how to use FPGAs for easy, low-cost floating-point processing.
High-level tools become mainstream for DSP
News & Analysis  
12/12/2006   Post a comment
"East is East, and West is West, and never the twain shall meet," Rudyard Kipling famously wrote. Until recently, a similar perspective applied to the development process for signal processing systems. Read on to find out how this process for DSP can be broken down into three basic steps and how this trend will accelerate in 2007.
Peering into the future of Programmable Logic Design
News & Analysis  
12/12/2006   Post a comment
2007 is almost upon us—what are we going to see that will really blow our socks off and make us leap from our seats shouting "YES!"?
FPGA-to-ASIC integration provides flexibility in automotive microcontrollers
Design How-To  
12/9/2006   Post a comment
The primary benefit of using MCUs has been high level system integration combined with relatively low cost. However, there are hidden costs associated with these devices well beyond the unit price.
Slow growth may push analog, FPGA firms private
Product News  
12/8/2006   Post a comment
The semiconductor industry is headed for an era of single-digit growth, that may attract analog and FPGA chip makers to go private as the industry consolidates, said the top chip analyst for Gartner Dataquest at a December 8 briefing
Xilinx lowers quarterly sales guidance
News & Analysis  
12/7/2006   Post a comment
Programmable logic market leader Xilinx issued revised guidance for the current quarter, saying it now expects sales to be down 2 to 5 percent sequentially from the $467.2 million in sales the company posted for the previous quarter.
Graphical tools for rapid design, prototyping, and deployment
Design How-To  
12/6/2006   1 comment
Graphical system design is a revolutionary approach that blends graphical programming and commercial off-the-shelf (COTS) hardware. It uses a single environment from initial design to final deployment, allowing you to leverage the knowledge of experts who are not embedded designers.
Xilinx launches Spartan-3A FPGAs for I/O intensive applications
Product News  
12/6/2006   Post a comment
Built on 90-nm process technology, Xilinx's Spartan-3A FPGA family is the third platform in the Spartan-3 FPGA generation. It is suitable for bridging, differential signaling and memory interfacing applications that require wide or multiple interfaces and modest processing.
Xilinx sets PLD industry record with delivery of 26 million FPGAs
News & Analysis  
12/5/2006   Post a comment
Xilinx has established an impressive track record as one of the first to 150nm in 2001, 130nm in 2002, 90nm in 2003, and 65nm in 2006.
Lattice receives industry quality ISO/TS 16949 certification
News & Analysis  
12/5/2006   Post a comment
ISO/TS 16949 certification is another milestone in Lattice's expanding commitment to the automotive market.
How to implement high-speed 667 Mbps DDR2 interfaces with FPGAs
Design How-To  
12/5/2006   Post a comment
To achieve a robust high data rate, such as 667 Mbps in a DDR2 system, a dynamic auto-calibration PHY IP core significantly simplifies the memory interface design.
How to implement high-security in low-cost FPGAs
Design How-To  
12/5/2006   Post a comment
"Device DNA" can protect your design and embedded code from cloning, overbuilding, and reverse-engineering while still using outsourced manufacturing and assembly facilities.
Xilinx rolls out Spartan-3a low-cost I/O-optimized FPGAs
Product News  
12/5/2006   Post a comment
New Xilinx cost-reduced Spartan-3a FPGA family targets high-volume applications requiring high I/O gate ratio, low-power, and anti-cloning security capabilities.
AMD, Hynix to crack top 10 in '06, iSuppli says
News & Analysis  
12/4/2006   Post a comment
Advanced Micro Devices and Hynix Semiconductor will finally break into the list of the world's top 10 semiconductor suppliers this year, according to a preliminary ranking from market research analyst iSuppli, which increased its chip industry growth forecast to 9 percent for 2006.
Analyst cuts '06 chip forecast, warns of tough Q4
News & Analysis  
12/4/2006   Post a comment
A financial analyst cut his forecast for 2006 semiconductor industry growth for the third time and said the Philadelphia Stock Exchange SOX semiconductor index could decline in December given continued supply chain inventory reductions, impending first quarter seasonal weakness and continued negative year-on-year industry revenue comparisons.
SIA: Record October chip sales, but slowdown looms
News & Analysis  
12/1/2006   Post a comment
October worldwide semiconductor sales reached $21.9 billion, setting a new monthly record for the fourth consecutive month, according to the Semiconductor Industry Association. But the organization's chief warned of a slowdown on the horizon.


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1 Comment
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