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Content tagged with FPGA/PLD/CPLD
posted in February 2006
Anyone need a world-leading ASIC design team?
Programmable Logic DesignLine Blog  
2/27/2006   Post a comment
3D Labs just closed down their operation in Huntsville AL, with the result that a world-leasing ASIC design and verification team is looking for a new home.
Programmable power management solutions from Lattice
Product News  
2/27/2006   Post a comment
Lattice expands its Power Manager II family with programmable power management solutions for high-volume applications
What are framers and mappers?
Programmable Logic DesignLine Blog  
2/24/2006   Post a comment
A reader poised a question to me regarding framers and mappers; I don't have a clue; perhaps you can help?
Elliptic Semiconductor ports security IP cores to Lattice FPGAs
News & Analysis  
2/23/2006   Post a comment
Encryption and decryption cores from Elliptic Semiconductor protect digital information on LatticeECP, LatticeEC, and LatticeXP FPGAs from Lattice Semiconductor.
Xilinx, ISR offering SDR kit
News & Analysis  
2/22/2006   Post a comment
Xilinx and ISR Technologies released an off-the-shelf prototyping-to-production kit that the companies say accelerates implementation of software defined radio modems.
Virtex-4 FPGA-based kit accelerates adoption of software-defined radio modems
Product News  
2/22/2006   Post a comment
Xilinx has teamed up with ISR Technologies to develop an off-the-shelf prototyping-to-production kit that accelerates implementation of SDR (software-defined radio) modems. The SDR kit leverages the partial reconfiguration feature of Virtex-4 FPGAs, and complies with JTRS-mandated specifications, including the Software Communications Architecture (SCA).
The state-of-play in multi-processor and reconfigurable computing
Design How-To  
2/21/2006   Post a comment
When a conventional processor (core) cannot meet the needs of a target application, it becomes necessary to evaluate alternative solutions such as multiple cores and/or configurable cores.
Multi-processor and reconfigurable computing
Programmable Logic DesignLine Blog  
2/21/2006   Post a comment
Trying to wrap one's brain around the myriad alternative computing strategies available to today's designers is enough to make your eyes water!
Renesas reshuffles management, names Ito chairman
News & Analysis  
2/21/2006   Post a comment
In an overhaul of its management, Tokyo-based Renesas Technology Corp. has announced that president and CEO Satoru Ito will become the company's chairman.
Deja Vu (Did somebody just say that?)
Programmable Logic DesignLine Blog  
2/16/2006   Post a comment
In my last Blog, which was on the need for a good RTOS for multicore systems, I mentioned Quadros; so imagine my surprise to see today's news...
FPGA tool suite streamlines embedded system design
Product News  
2/15/2006   Post a comment
Xilinx's 8.1i version of the Platform Studio tool suite incorporates a new graphical user interface that is intended to streamline embedded processing design.
Cyclone II FPGAs support extended temperature range
Product News  
2/15/2006   Post a comment
For designers building temperature-sensitive applications in the industrial, military and automotive sectors, Altera has released Cyclone II FPGAs that can operate in the extended temperature range of -40°C to +125°C.
Cyclone II FPGA family available in extended temperature range
News & Analysis  
2/15/2006   Post a comment
Programmable logic supplier Altera said its low-cost Cyclone II FPGA family is now available in an extended temperature range, enabling the FPGAs to operate at a junction temperature of -40 degrees Celsius to 125 degrees Celsius.
Xilinx embedded tool suite promises intuitive environment
Product News  
2/14/2006   Post a comment
Programmable logic supplier Xilinx announced the immediate availability of the 8.1i version of the Xilinx Platform Studio tool suite for embedded processing design.
Xilinx partners on programmable board for auto infotainment
Product News  
2/14/2006   Post a comment
Programmable logic supplier Xilinx has collaborated with intellectual property core supplier Xylon to create what the companies say is the world's first programmable development board designed specifically for the automotive infotainment market.
Using programmable logic in dynamic consumer electronics markets
Design How-To  
2/13/2006   Post a comment
A design methodology based on programmable logic enables products to be managed throughout their entire life cycle within the volatile consumer electronics market.
RTOS designed for multicore systems
Programmable Logic DesignLine Blog  
2/13/2006   Post a comment
I find it relatively easy to wrap my brain around the concept of an operating system running on a single processor. But what about a system containing multiple heterogeneous CPU and DSP cores?
Cool "stuff" on the processor front.
Programmable Logic DesignLine Blog  
2/10/2006   Post a comment
I don't know about you, but I'm tremendously excited by the ongoing developments in processing technology.
Asynchronous array of processors chip presented at ISSCC 2006
News & Analysis  
2/9/2006   Post a comment
An experimental chip called an Asynchronous Array of Simple Processors (AsAP) is of particular interest for DSP Applications.
Two 90-nm FPGA product lines hit the market with lower price tags
Product News  
2/9/2006   Post a comment
Lattice Semiconductor launched the 90-nm generation of its FPGAs with the introduction of two product families. The LatticeSC (system chip) FPGAs combine high-speed I/O, SerDes, structured ASIC blocks and a high-performance fabric on a single device. And its second-generation ECP2 devices offer double the density at half the cost.
Cypress completes acquisition of subsidiary
News & Analysis  
2/8/2006   Post a comment
Cypress Semiconductor has completed the acquisition of the 6.5 percent outstanding minority shareholder interest in its Cypress MicroSystems subsidiary.
Cool new FPGA families from Lattice
Programmable Logic DesignLine Blog  
2/8/2006   Post a comment
Industry analyst says Lattice now has the breadth and depth of FPGA products to become the third force in the FPGA market.
Altera FPGAs cut IP security costs and seek new SDR markets
News & Analysis  
2/8/2006   Post a comment
Unique intellectual property security feature safeguards transfer of tactical radio tyechnology, eliminating the need for costly custom chip development.
Lattice launches LatticeSC System Chip FPGA family
Product News  
2/8/2006   Post a comment
LatticeSC System Chip FPGAs combine high-speed I/O, SERDES, Structured ASIC blocks, and high-performance FPGA fabric on a single device.
Lattice introduces low cost 90 nm LatticeECP2 FPGA family
Product News  
2/8/2006   Post a comment
Second generation EConomy Plus devices expand concept by reducing prices 50% and doubling available density.
Breakthrough power efficiency for 3G/3.5G wireless base station radios
Product News  
2/7/2006   Post a comment
Altera wireless partner TelASIC uses HardCopy, Stratix, and Cyclone II devices for rapid development of flexible air interface systems.
Altera's solutions are winners and nominees for industry awards
News & Analysis  
2/7/2006   Post a comment
Altera's HardCopy II, Stratix II GX and Cyclone II programmable solutions are recognized for providing users with the ability to innovate and be more productive.
Things are buzzing at the Multicore Association
Programmable Logic DesignLine Blog  
2/7/2006   Post a comment
Open for membership, the Multicore Association announces executive board slate and first public presentations on workgroup progress.
Programmable x8 PCIe IP core makes PCI-SIG Integrators List
Product News  
2/7/2006   Post a comment
Xilinx, Inc. announced immediate availability of its compliant x1, x4 and x8 lane LogiCORE PCI Express IP Core targeted for telecom, networking, storage and video applications.
Stratix II enables 667-Mbps DDR SDRAM data rate, Altera says
News & Analysis  
2/6/2006   Post a comment
Programmable logic supplier Altera announced that its Stratix II device family is qualified to support the 667-megabits-per-second DDR2 SDRAM interface data rate.
667-Mbps DDR2 SDRAM data rate with Altera's Stratix II FPGAs
News & Analysis  
2/6/2006   Post a comment
See Altera's 667-Mbps DDR2 SDRAM interface demonstration using Stratix II FPGAs at DesignCon 2006
Enhanced analysis tool simplifies partial reconfiguration, boosts FPGA performance by 30%
Product News  
2/6/2006   Post a comment
Version 8.1 of PlanAhead, a hierarchical design and analysis tool that is an optional add-on to Xilinx's Integrated Software Environment (ISE) design software, simplifies partial reconfiguration and boosts Virtex-4 and Spartan 3E performance by 30%.
There's always another twist!
Programmable Logic DesignLine Blog  
2/2/2006   Post a comment
The high-level multi-threaded language and tool called Mobius makes it easy to develop complex applications for FPGAs.
FPGAs add flexibility to communications traffic management
Design How-To  
2/1/2006   Post a comment
A 10-Gbps FPGA-based traffic manager solution meets the demands of next-generation networks by supporting high-speed throughput in a solution that can adapt to the changing market.
Xilinx releases Virtex-4 FPGA-based 667-Mbits/s DDR2 reference design
Product News  
2/1/2006   Post a comment
Xilinx Inc. has released the Virtex-4 FPGA-based 667-Mbits/s DDR2 SDRAM reference design that uses ChipSync technology, a run-time calibration circuit that is aimed at improving design margins and system reliability.


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