Xilinx looks to ease path to custom FPGAs News & Analysis 3/25/2002 Post a comment Several years after exiting the FPGA-to-ASIC conversion business, Xilinx Inc. (San Jose, Calif.) has come up with a "no-risk" alternative for customers who want a lower piece price for higher volume orders, the company said.
NEC targets cell-based routable ASICs at 'mid-volume' applications News & Analysis 3/18/2002 Post a comment TOKYO -- In a move to create a new class of ASIC products for "mid-volume" applications, NEC Corp. today introduced a functional-block chip architecture, which allows customers to quickly route pre-existing cells on ICs for custom designs using two upper layers of metal--just like a gate array.
UMC says Xilinx foundry relationship not threatened by IBM pact News & Analysis 3/5/2002 Post a comment HSINCHU, Taiwan--United Microelectronics Corp. here today said its silicon foundry relationship with customer Xilinx Inc. remains intact despite a major manufacturing agreement between Xilinx and IBM Corp. On Monday, IBM announced it had reached a multi-million dollar two-year agreement to make Xilinx field-programmable gate arrays using its most advanced copper processes (see March 4 story).
Xilinx counters Altera with new FPGA offering News & Analysis 3/4/2002 Post a comment
Now that OEMs are beginning to replenish depleted inventories, the stakes are being raised in the PLD contest, with the two dominant players maneuvering for market share and mind-share as they strive to bring programmable logic to a new level.
Xilinx begins sampling PowerPC-based FPGA News & Analysis 3/4/2002 Post a comment Xilinx is sampling its Virtex-II Pro FPGAs, a family of five devices with four, eight or 16 serial transceivers running at 3.125Gbit/s and up to four IBM PowerPC 405 processor cores, each running at up to 300MHz.
As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.
January 2016 Cartoon Caption ContestBob's punishment for missing his deadline was to be tied to his chair tantalizingly close to a disconnected cable, with one hand superglued to his desk and another to his chin, while the pages from his wall calendar were slowly torn away.122 comments