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Content tagged with FPGA/PLD/CPLD
posted in April 2008
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How to raise the RTL abstraction level and design conciseness with SystemVerilog - Part 1
Design How-To  
4/30/2008   Post a comment
Using advanced HDLs like SystemVerilog, current hardware modeling styles can be enhanced both in terms of abstraction levels and overall efficiency.
Synaptics advances gesture recognition technology for ClearPad solutions
Product News  
4/30/2008   Post a comment
Enhanced Gesture Recognition (EGR) eases integration of gestures for touchscreen devices.
A simple, cost-effective solution to protect FPGA designs
Product News  
4/30/2008   Post a comment
Maxim Integrated Products and Altera offer a simple, cost-effective solution to protect FPGA designs.
SRC to provide FPGA-based computing solutions for PI TrackR program
News & Analysis  
4/29/2008   Post a comment
The ability to process sensor information in-flight versus losing precious time while data is relayed to a ground station is significant.
Unicycle-Motorcycle-Segway-Hybrid
Programmable Logic DesignLine Blog  
4/29/2008   Post a comment
This little scamp looks to be mega-cool and uber-uncomfortable, but what's comfort when you have "cool"?
Mezzanine card design makes FPGA integration easy
Product News  
4/29/2008   Post a comment
VMETRO announced its first FPGA Mezzanine Card (FMC/VITA 57) module dubbed the ADC510, which is available in air-cooled and conduction-cooled rugged versions, integrates two 12-bit 500MHz A/D chips for use in DSP applications such as Signal Intelligence (SIGINT), Electronic Counter Measures (ECM), and Radar.
Research firm bases FPGA on fractal-like structure
News & Analysis  
4/29/2008   Post a comment
Cellot Ltd. (Netanya, Israel) is developing a programmable logic and memory architecture dubbed Field Programmable Cell Logic (FPCL), which is based on a recursive, fractal-like, structure.
All-in-one Victorian (Steampunk) computer
Programmable Logic DesignLine Blog  
4/28/2008   Post a comment
Not content with his old water-cooled computer, our old friend Jake von Slatt has just created the most amazing All-in-One Victorian machine.
Processing engine supports latest FPGA mezzanine card standard
Product News  
4/28/2008   Post a comment
VMETRO announced one of the industry's first FPGA processing engines with support for the FPGA Mezzanine Card (FMC/VITA 57) standard.
DO-254-certifiable Nios II embedded processor
Product News  
4/28/2008   Post a comment
Altera and HCELL Engineering announce DO-254-certifiable Nios II processor core for use in airborne hardware environments.
QuickLogic supplying engineering samples of PolarPro II CSSP solution platform
Product News  
4/28/2008   Post a comment
Small form-factor PolarPro platform from QuickLogic housed in a 6 mm x 6 mm BGA package for handheld devices; I/O structure highly optimized for mobile applications.
Lattice announces new CPLD family
Product News  
4/28/2008   Post a comment
New ispMACH 4000ZE CPLDs from Lattice address increasing demand for small, low-power, and low-cost portable products.
Synaptics takes touch interfaces to the next level
Product News  
4/28/2008   Post a comment
Using Synaptics ClearTouch technology, designers can move beyond buttons by integrating transparent sensor controls.
Altera launches DO-254 Global Partner Network
News & Analysis  
4/28/2008   Post a comment
Development environment provides specialty solutions and services for systems requiring DO-254 compliance.
MathStar leads in Field Programmable Computing Array (FPCA) category
News & Analysis  
4/28/2008   Post a comment
In a new market study, Semico Research identifies MathStar's Arrix family as leading the Field Programmable Computing Array (FPCA) category.
Multirate DSP, part 2: Noninteger sampling factors
Design How-To  
4/28/2008   1 comment
Part 2 show how to change the sampling rate by a non-integer factor. It also looks at multistage decimation and polyphase filters. Finally, it applies the concepts of upsampling and downsampling to a CD player.
The Leningrad Cowboys
Programmable Logic DesignLine Blog  
4/25/2008   Post a comment
Now, here's something you don't see very often ... this video nearly blew my socks off!
My computer woes (Part Deux)
Programmable Logic DesignLine Blog  
4/25/2008   Post a comment
In which we discover what happened to the back-up image for my machine
An engineer's guide to cats
Programmable Logic DesignLine Blog  
4/24/2008   Post a comment
None of the cats or engineers were mistreated in the making of this film.
Virtex-5 FPGA accelerates development of multi-definition keyer
Product News  
4/24/2008   Post a comment
Multi-channel, open-platform SD/HD video production switch from Ross Video takes advantage of integrated high-speed logic, DSP, and on-chip memory of Virtex-5 LXT FPGA.
Virtex-5 FPGA powers universal multi-channel processor
Product News  
4/24/2008   Post a comment
3G/HD/SD audio/video processor from Miranda Technologies leverages triple-rate SDI capabilities of the DSP-optimized Virtex-5 SXT platform.
New triple-rate SDI reference designs from Xilinx
Product News  
4/24/2008   Post a comment
Virtex-5 FPGAs enable future-proof interface designs capable of supporting 1080p60 video.
Advanced video processing platform from Xilinx and OmniTek
Product News  
4/24/2008   Post a comment
Development platform bridging SD/HD/3G-SDI to the PCI Express standard enjoys broad adoption among designers of broadcast and digital cinema equipment.
$39 Spartan-3A FPGA evaluation kit
Product News  
4/24/2008   2 comments
Avnet Electronics Marketing introduces low-cost Spartan-3A FPGA evaluation kit.
$395 Virtex-5 FXT FPGA evaluation kit
Product News  
4/24/2008   Post a comment
Avnet Electronics Marketing delivers Virtex-5 FXT FPGA evaluation kit.
Complete Linux design solution for MicroBlaze FPGA-based soft-core processor
Product News  
4/24/2008   Post a comment
Avnet MicroBlaze Processor Linux DVD, Kit and Linux for MicroBlaze Processor SpeedWay Design Workshop Series offers complete design and support solution.
A cryptic message about cryptography
Programmable Logic DesignLine Blog  
4/24/2008   Post a comment
Can you help (a) decoding this message from a visitor and (b) providing an answer to his cryptographic comundrum?
RepRap " Self-replicating machine
Programmable Logic DesignLine Blog  
4/23/2008   Post a comment
Here's a novel idea... an open-source DIY (do-it-yourself) rapid prototyping machine that can manufacture a significant fraction of its own parts.
Choosing a microcontroller and other design decisions - Part 1
Design How-To  
4/23/2008   1 comment
This three-part article is abstracted from the book "Embedded Hardware Know It All", which provides a "360 degree" view from best-selling authors.
Startup raises funds for telecom-specific FPGAs
News & Analysis  
4/23/2008   Post a comment
Startup Omiino Ltd. (Newtownabbey, Northern Ireland) has raised a seed funding round of £1.05 million (about $2.1 million) to be used for the development of a specialized field-programmable gate array (FPGA) optimized for use in telecommunications network equipment.
ChipX mixed-signal ASIC processes and procedures satisfy DO-254 standard
News & Analysis  
4/22/2008   Post a comment
ChipX is now ready to offer DO-254 certification support for aerospace and military ASIC projects.
Lattice and Synplicity extend partnership
News & Analysis  
4/22/2008   Post a comment
Lattice selects Synplicity as its exclusive logic synthesis solutions provider.
Actel and Pigeon Point Systems to deliver TCA management solutions
Product News  
4/22/2008   Post a comment
Expansion of Actel's TCA offering allows Fusion PSCs to provide sophisticated ATCA and MicroTCA system management capabilities.
FPGA design and verification solutions from Lattice and Aldec
Product News  
4/22/2008   Post a comment
High-speed Aldec simulator is claimed to be the only OEM mixed-language simulator for FPGA design.
Are you going to Stockholm, Sweden?
Programmable Logic DesignLine Blog  
4/21/2008   Post a comment
If you happen to be planning a trip to Stockholm in Sweden, I happen to know the perfect place to stay.
Polish IP provider makes 6802 microcontroller core
Product News  
4/21/2008   Post a comment
Intellectual property provider Digital Core Design SA (Wroclaw, Poland) has announced the release of the D6802, an 8-bit microprocessor core, which is compatible with the 6802 industry-standard pin out, clock frequencies and instructions set.
XMOS programmable chips bring flexibility, differentiation at low cost
Product News  
4/21/2008   Post a comment
XMOS has launched a programmable chip line that eliminates the delays involved in classic hardware description languages and low-level logic synthesis by employing an entirely software-based design flow using C and the XMOS-originated XC-programming language.
Multirate DSP, part 1: Upsampling and downsampling
Design How-To  
4/21/2008   4 comments
Part 1 introduces multirate signal processing, explaining how to upsample and downsample by an integer factor. MATLAB code included.
eASIC shatters FPGA performance with 235-MHz LEON3 processor
Product News  
4/21/2008   Post a comment
eASIC Corp. and Gaisler Research have migrated the LEON3 processor to eASIC's Nextreme family of zero mask-charge ASIC devices and achieved 235-MHz performance, shattering the performance achievable using high performance FPGAs.
Don't talk to me about #$%* computers!
Programmable Logic DesignLine Blog  
4/17/2008   Post a comment
I've been bursting with ESC news to share, but I've been having computer woes you would not believe.
New plug-and-play options for Altium's Innovation Station
Product News  
4/17/2008   Post a comment
Altium announce four new FPGA daughter boards and new plug-in peripheral boards for the Innovation Station at ESC, Silicon Valley.
Start-up offers a floating-point VHDL library as Open Source
Product News  
4/17/2008   Post a comment
Parameterized floating-point mathematical operators from start-up OptNgn are optimized for FPGA designs.
XMOS Semi : Programmable chips bring flexibility and differentiation at low cost
Product News  
4/17/2008   Post a comment
XMOS Semiconductor, the creator of Software Defined Silicon (SDS), has announced a family of programmable chips.
Synplicity introduces System Designer: System-level implementation and IP integration tool for FPGA design
Product News  
4/16/2008   Post a comment
A key element of Synplicity's ReadyIP Program; System Designer enables a high-productivity design flow within the synthesis environment.
Tensilica offers free production-ready processor Core for FPGAs
Product News  
4/16/2008   Post a comment
As part of Synplicity's ReadyIP Program, Tensilica has announced the Diamond Standard 106Micro -- an alternative to FGPA vendor proprietary CPUs.
Synplicity launches ReadyIP program; The industry's first universal, secure IP flow for FPGA implementation
News & Analysis  
4/16/2008   Post a comment
Key IP Vendors (ARM, CAST, Gaisler Research, Synopsys, and Tensilica) endorse Synplicity's new ReadyIP program.
LatticeECP2M FPGAs support high-speed JESD204 spec
Product News  
4/16/2008   Post a comment
Embedded high-speed SERDES channels in the LatticeECP2M FPGA family enable support of the JESD204 serial ADC standard.
Researchers tout memory advance, offer prospect of 300 million tune MP3 player
News & Analysis  
4/16/2008   Post a comment
Researchers at the University of Glasgow (Scotland) have devised a molecular scale switch that they claim could dramatically improve the data storage capability of devices without increasing their size.
Group formed to develop airborne pathogen detection
News & Analysis  
4/16/2008   Post a comment
Printed photonic sensors specialist Nanoident Technologies AG, (Linz, Austria) has teamed with German company microfluidic ChipShop to develop an airborne pathogen detection system for the European Defence Agency.
C-to-FPGA guide
Design How-To  
4/16/2008   Post a comment
Want to create FPGA designs in C? Here's everything you need to know, including the latest how-to articles, products, and news.
Page 1 / 2   >   >>


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Aubrey Kagan
37 comments
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No 2014 Punkin Chunkin, What Will You Do?
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Rich Quinnell
15 comments
As every developer knows, there are the paper specifications for a product design, and then there are the real requirements. The paper specs are dry, bland, and rigidly numeric, making ...

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