Embedded Systems Conference
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Content tagged with FPGA/PLD/CPLD
posted in May 2000
Blood on the floor
Blog  
5/24/2000   Post a comment
A little less cynical these days, Steve Ohr offers new perspectives on programmable analog devices
Xilinx tunes tools for big FPGAs
News & Analysis  
5/8/2000   Post a comment
FPGA tools will draw a step closer to their ASIC counterparts this week, when Xilinx Inc. releases a version of its Alliance Series software aimed at helping users efficiently design with multi- million-gate FPGAs.
Altera acquires Canadian design firm for optical networking expertise
News & Analysis  
5/1/2000   Post a comment
Altera Corp. announced Monday (May 1) that it has acquired privately-held DesignPRO Inc., a provider of intellectual property (IP) cores and custom design solutions, specializing in optical internetworking technologies.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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