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Content tagged with FPGA/PLD/CPLD
posted in May 2006
How to create fixed- and floating-point IIR filters for FPGAs
Design How-To  
5/31/2006   Post a comment
Once you have decided to use an infinite impulse response (IIR) filter, how do you efficiently explore different architectures and implement it in FPGA hardware?
Cosmic rays damage automotive electronics
Design How-To  
5/31/2006   Post a comment
While the concept of bombardment of neutrons from space sounds like something straight out of Star Trek, neutron-induced errors are a dangerous reality for many types of automotive electronic equipment.
Altera reaffirms Q2 guidance; expects stock options expenses
News & Analysis  
5/30/2006   Post a comment
Altera reaffirmed previously given second quarter guidance and said that it expects to report "several million dollars" of expense related to the company's previously announced review of historical stock options granting practices.
Altera, partners offer FPGA-based MOST interface
Product News  
5/30/2006   Post a comment
Programmable logic supplier Altera announced the availability of the MediaLB intellectual property core developed in partnership with design services provider IFI and chip vendor SMSC.
Gartner: FPGA/PLD market to grow 14 percent in '06
News & Analysis  
5/26/2006   Post a comment
The market for FPGAs and other programmable logic devices is expected to grow from $3.2 billion in 2005 to $6.7 billion in 2010, according to Bryan Lewis, a vice president and chief analyst of ASIC, SoC and FPGA research at market analyst firm Gartner Dataquest.
Altera target of investigations, shareholder suits
News & Analysis  
5/26/2006   Post a comment
The U.S. Securities and Exchange Commission and the U.S. Attorney for the Northern District of California are looking into historical stock options granting practices at programmable logic supplier Altera.
How to become a hot commodity (if you're a signal integrity engineer)!
Design How-To  
5/24/2006   Post a comment
SI engineers ensure first time success of very high speed systems (read fast edge rates) through the proper combination of theory, simulation, and measurements.
FPGA market to pass $2.7 billion by '10, In-Stat says
News & Analysis  
5/24/2006   Post a comment
The value of worldwide FPGA shipments is expected to increase from $1.9 billion in 2005 to $2.75 billion by 2010, with much of the revenue coming from low-volume shipments, according to high-tech market research firm In-Stat.
Altera enables ZAPiT Games' breakthrough in interactive, console-based family gaming
News & Analysis  
5/23/2006   Post a comment
The ZAPiT Game Wave system uses up to six wireless remote controls for fast, wait-free interactive play of family-oriented content.
Aldec granted new patent on automatic ASIC prototyping
News & Analysis  
5/23/2006   Post a comment
Patented clock conversion algorithm translates ASIC designs with multiple clock domains into equivalent FPGA circuits clocked by a single clock line.
How to invert three signals with only two NOT gates (and *no* XOR gates): Part 2
Design How-To  
5/22/2006   Post a comment
In part two of this article, we consider a dynamic solution to our original problem (using a ring oscillator and other "stuff"); also, we learn how to implement a NOT gate using four AND gates!
QuickLogic announces production shipments of PolarPro FPGAs
Product News  
5/18/2006   Post a comment
Billed as the world's lowest power FPGAs, PolarPro devices boast power consumption 98% and 99% better than competing Flash- and SRAM-based FPGAs, respectively.
Altera could face delisting; Brooks note holders want cash
News & Analysis  
5/17/2006   Post a comment
The controversy over historical stock options granting practices at two electronics companies heated up, with programmable logic supplier Altera Corp. saying its stock could be delisted from the Nasdaq market and fab automation provider Brooks Automation Inc. saying it could be compelled to repay some subordinated notes earlier than expected.
FPGA vendor expands IP portfolio for military, aerospace apps
Product News  
5/17/2006   Post a comment
Actel is offering two new IP cores optimized for use with its radiation-tolerant and firm-error immune FPGAs, including its flash-based ProASIC 3 and RTAX-S families.
Synplicity unveils visibility enhancement technology
News & Analysis  
5/17/2006   Post a comment
EDA tool vendor Synplicity Inc. will launch a visibility enhancement technology by the end of the year.
Xilinx amends corporate governance rules
News & Analysis  
5/15/2006   Post a comment
Programmable logic market leader Xilinx said its board of directors has made several changes to the company's corporate governance structure, including stock ownership requirements for directors and high-ranking executives and a limit on the number of public boards that a director may serve on.
Toshiba, ARC in configurable processor collaboration
News & Analysis  
5/15/2006   Post a comment
Toshiba Corp. and ARC International have entered into a strategic collaboration intended to grow the worldwide semiconductor industry's adoption of configurable technology, the companies said.
Virtex-5 devices aren't your mother's FPGAs!
Programmable Logic DesignLine Blog  
5/15/2006   Post a comment
Xilinx have just unveiled a new FPGA architecture at the 65 nm technology node, and these little rapscallions are mega-amazing!
Xilinx unveil revolutionary 65nm FPGA architecture: the Virtex-5 family
Product News  
5/15/2006   Post a comment
Xilinx has introduced a new family of next-generation FPGAs; these Virtex-5 devices are the world's first FPGAs to be fabricated at the 65 nm technology node.
How to invert three signals with only two NOT gates (and *no* XOR gates): Part 1
Design How-To  
5/14/2006   2 comments
Even for hardened logic designers, these solutions will delight and entertain (also, there's a new "Brain Boggler" to be pondered).
Altera CEO: no timetable for investigation
News & Analysis  
5/11/2006   Post a comment
No timetable has been set for Altera's investigation of its internal stock options granting procedures from 1996 to 2000, according to John Daane, president, chairman and CEO of the programmable logic supplier.
How hybrid Structured ASICs provide low cost solutions for mid-range applications
Design How-To  
5/10/2006   Post a comment
Hybrid structured ASICs take the structured idea one step further, because the upper metal layers don't require the same level of precision as the base layers.
MathStar unveils machine vision library for FPOA
Product News  
5/9/2006   Post a comment
MathStar introduced a machine vision library for the company's field programmable object array programmable logic devices.
Altera shipping next Nios II, development tools
Product News  
5/9/2006   Post a comment
Programmable logic supplier Altera is now said it is now shipping version 6.0 of its Nios II embedded processor and the Nios II Embedded Design Suite.
A low-cost solution for FPGA-based PCI Express implementation
Design How-To  
5/3/2006   Post a comment
The combination of a low-cost FPGA and an external physical interface (PHY) chip is uniquely positioned to displace costly, high-risk solutions such as ASICs.
Yamaha extends license deal with Virage
News & Analysis  
5/3/2006   Post a comment
Extending a long-term standard cell technology licensing agreement, Virage Logic announced that Japan-based Yamaha Corp. has strengthened its relationship by licensing components of Virage Logic's IPrima platform including embedded memories and standard cells.
Virtex-4 FPGAs support H.264 digital video codec IP
Design How-To  
5/3/2006   Post a comment
Xilinx recently teamed up with Ateme and 4i2i to port their high definition H.264 digital video codec IP on its Virtex-4 FPGAs.
DARPA's latest challenge gets down and raises the bar
News & Analysis  
5/2/2006   Post a comment
For the next competition, robot vehicles will have to obey traffic regulations, merge into traffic, and traverse roadways in an urban environment.


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1 Comment
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