Breaking News
Content tagged with FPGA/PLD/CPLD
posted in June 2009
Page 1 / 2   >   >>
Global chip sales seen ticking up in May
News & Analysis  
6/30/2009   Post a comment
Global chip sales in May are believed to have increased by a seasonally adjusted 2 percent on the previous month, according to analysts at Carnegie Group (Oslo, Norway).
Rapid debug of serial buses in FPGAs
Design How-To  
6/30/2009   1 comment
Low-speed serial buses remain prevalent in computer, semiconductor, aero/defense, communications, consumer automotive, medical, test and measurement industries. Serial buses such as I2C, SPI, CAN, LIN, and RS-232 are often key points for debugging designs with FPGAs which higher speed serial buses quickly pass data from chip to chip. Historically, capturing and decoding the information required significant manual effort if using an oscilloscope or the purchase of custom tools. Oscilloscope v
Altera rolls low power, anti-tamper FPGAs
Product News  
6/29/2009   Post a comment
Altera this week is rolling out a new product family, Cyclone III LS, billed by the company as the industry's first low power FPGAs with anti-tamper, design-security and design-separation features.
Mentor adds support for control logic to Catapult C
Product News  
6/29/2009   Post a comment
EDA vendor Mentor Graphics announced extensions to its Catapult C Synthesis tool to support full-chip high-level synthesis, a move billed by company executives as the most significant enhancements to Catapult C since the tool was introduced in 2004.
Samsung using 45-nm process for ARM-11 based processor
News & Analysis  
6/29/2009   Post a comment
Samsung Electronics Ltd has started sampling its ARM11-based application processor that will be made on its 45-nm CMOS process technology.
Altera enhances security in extended Cyclone-III FPGA family
Product News  
6/29/2009   Post a comment
Altera Corp. (San Jose, Calif.) has introduced the Cyclone-III LS family of FPGAs with enhanced security features. The devices are made on a 60-nm process technology from TSMC and offer 0.25W of static power consumption for 200,000 logic elements.
Tutorial: the new JEDEC interface standard for data converters, Part 1 of 3
Design How-To  
6/29/2009   Post a comment
Understand the design implications of JESD204A for high-speed analog/digital and digital/analog converters
The results are in!
Design How-To  
6/24/2009   Post a comment
Finally, we have the runner up and the first-place winner from our Altium Design competition!
What a clever idea!
Design How-To  
6/24/2009   Post a comment
From the sublime (a mega-cool Discworld guide) to the ridiculous (a 15-year old wins $50,000 for texting on her cell phone).
Altium Design Contest winner: yyCAN review
Design How-To  
6/24/2009   Post a comment
This article by James Brakefield, selected as the winner of the Altium Design Contest, describes his yyCAN controller (the name has multiple meanings) written in VHDL.
Xilinx releases eval kits for Virtex-6, Spartan-6
Product News  
6/24/2009   Post a comment
Xilinx delivered on the next phase of the targeted design platform concept it announced earlier this year, rolling out evaluation kits for its Virtex-6 and Spartan-6 field programmable gate arrays.
XMOS moves processors to 65-nm, drops price
Product News  
6/24/2009   Post a comment
Event-driven processor startup XMOS Semiconductor Ltd. (Bristol, England) has launched a second family of products by migrating designs to 65-nm process technology from Taiwan Semiconductor Manufacturing Co. Ltd. As a result the company is taking the price for 10,000 units below $5.
Altium Design Competition runner up: Building an in-car MP3 player using NanoBoard
Design How-To  
6/23/2009   1 comment
Doug Gibbs, a Senior Staff Software Engineer at Xilinx, was the runner up in the Altium Design Competition. Doug's idea is to build an in-car stereo MP3 player with an 802.11 connection to allow networking with a user's home PC. When you drive into the garage, you're the system will automatically sync to the PC and update all of the music you've downloaded.
Actel announces improvements to RTAX FGPAs
Product News  
6/23/2009   Post a comment
Actel announced improvements in performance and usability of its radiation-tolerant RTAX-S and RTAX-SL space-flight FPGAs, including reduced power consumption and faster speeds.
Denali rolls DFI specification version 2.1
News & Analysis  
6/23/2009   Post a comment
Denali Software Inc., one of the DDR-PHY Interface (DFI) specification participating members, has released the official DFI specification version 2.1.
Actel, Synopsys extend OEM agreement for FPGA tools
News & Analysis  
6/23/2009   Post a comment
Actel and EDA vendor Synopsys announced a multi-year extension of their OEM agreement for FPGA design tools.
Applying embedded design to develop an intelligent solar tracking system
Design How-To  
6/23/2009   4 comments
Solar panels are typically in fixed positions. They're limited in their energy-harvesting ability because they cannot consistently take full advantage of maximum sunlight. For more effective solar energy systems, the solar panels should be able to align with sunlight as it changes during a given day and from season to season. This article examines the design advantages of creating an intelligent solar tracking system using an embedded processor and an FPGA in a system-on-a-chip (SOC) architectur
Gartner warns of slow recovery in electronics
News & Analysis  
6/23/2009   Post a comment
Electronic equipment markets are predicted to start picking up in the fourth quarter of 2009 and lead to a sustainable recovery in the second half of next year, according to market research group Gartner Inc.
Intel, IBM spar for lead in Top 500 list
News & Analysis  
6/23/2009   Post a comment
Intel is on the rise in the world's fastest computers as ranked in the latest Top 500 supercomputer list, but IBM Corp. is still top dog and is making plans to keep it that way.
Xilinx sponsors Peking University-UCLA research program
News & Analysis  
6/18/2009   Post a comment
Xilinx said it would donate more than $500,000 worth of the company's flagship Virtex FPGA development systems and electronic design software to a new Joint Research Institute of Science and Engineering by China's Peking University and the University of California-Los Angeles.
Moore's Law repealed! But does it matter?
Design How-To  
6/18/2009   8 comments
Looking at the real cost, performance and time-to-market requirements designers face, the repeal of Moore's Law, which appears to be in progress, may not even matter anymore, according to Gene Frantz, Principal Fellow at Texas Instruments and creator of "Gene's Law", a power-related corollary of Moore's.
Freescale ColdFire processor cores available for eASIC's Nextreme NEW ASICs
Product News  
6/17/2009   Post a comment
Fabless ASIC vendor eASIC announced the immediate availability of Freescale's 32-bit V1 and V2 ColdFire processor cores for eASIC's Nextreme NEW ASICs.
Is that a penguin in your pocket or...
News & Analysis  
6/17/2009   1 comment
In which we ponder some dreadful puns, a penguin mouse, Fawlty Towers (and John Cleese's middle name), a rather cool virtual jukebox, and...
Bridging the voltage gap with FPGAs
Design How-To  
6/17/2009   Post a comment
FPGAs have become sensitive to power-design considerations in supporting multiple voltage options for I/O banks. This paper examines how some low-power FPGAs leverage the VCCI of each I/O bank to determine the voltage level of its I/Os, ranging from 1.2 V up to 3.3 V.
Beyond-IR: Remote Controls for Home Entertainment
Design How-To  
6/17/2009   3 comments
The alternative to infrared remote control technologies is RF-based remote controls. RF-based remote controls overcome three major limitations of infrared technologies: line-of-sight and range; one-way communications; and high power consumption. Let's take a look at each of these limitations.
SiliconBlue offers 'turbo' version of mobile FPGA family
Product News  
6/17/2009   Post a comment
SiliconBlue Technologies Corp. (Santa Clara, Calif.), has announced the availability of a version of its iCE65 family of FPGAs that the company claims is 65 percent faster than the original family.
The ongoing MathStar saga
Programmable Logic DesignLine Blog  
6/17/2009   1 comment
For a company that effectively shut its doors more than a year ago, MathStar still generates a lot of headlines.
U.S. readies broadband stimulus details
News & Analysis  
6/16/2009   1 comment
U.S. government agencies may release by the end of June guidelines for applying for the first round of a total of $7.5 billion in stimulus funds to extend the reach of broadband networks, and carriers and communications systems makers are gearing up to apply for the grants and loans, some of which will be awarded as early as September.
ISuppli: Gear costs to derail Moore's Law in 2014
News & Analysis  
6/16/2009   5 comments
Moore's Law, which has held as the benchmark for IC scaling for more than 40 years, will cease to drive semiconductor manufacturing after 2014, when the high cost of chip manufacturing equipment will catch up with the industry and make it economically unfeasible to do volume production of devices with feature sizes smaller than 18 nanometers, according to market research firm iSuppli.
Digital high def spec targets security systems
News & Analysis  
6/16/2009   Post a comment
The HDcctv Alliance formed by a handful of chip and systems companies is formally launching a new standard for high definition surveillance systems they think provides an easier, cheaper alternative to digital systems based on Internet Protocol.
SiliconBlue launches 'turbo' iCE65 mobile FPGAs
Product News  
6/15/2009   Post a comment
FPGA startup SiliconBlue Technologies announced the availability of a high-speed "turbo" option for its iCE65 mobileFPGA family.
Cypress : Programmable clock generators have ultra-low phase jitter
Product News  
6/15/2009   Post a comment
Cypress Semiconductor introduces the FleXO family of programmable high-performance clock generators.
Cypress PSoCs claim superior analog, digital performance
Product News  
6/15/2009   Post a comment
Cypress Semiconductor introduced two new PSoC programmable system-on-chips with enhanced analog and digital performance.
Lattice releases Service Pack 2 for ispLever 7.2 design tool suite
Product News  
6/15/2009   Post a comment
Lattice Semiconductor announced the availability of Service Pack 2 for Version 7.2 of the company's ispLever FPGA design tool suite, the flagship design environment for the latest Lattice products.
Actel cuts second quarter sales target
News & Analysis  
6/12/2009   Post a comment
Programmable logic vendor Actel cut its second quarter sales guidance, saying it now expects to report revenue of between $44.1 million and $46 million, a decline of 5 to 9 percent compared to the first quarter.
Motor efficiency depends on power-factor correction, too
Design How-To  
6/12/2009   2 comments
Active power-factor correction is necessary for modern motors due to the highly non-linear load they would otherwise present to the ac mains.
Lattice : FPGA family is automotive-qualified
Product News  
6/12/2009   Post a comment
Lattice Semiconductor has announced an automotive temperature qualified (AEC-Q100) low-cost Chip Scale 132 BGA (ball grid array) packaging for its non-volatile LatticeXP2 FPGA family.
ARM validates Cortex-A9 MPCore with eASIC device
Product News  
6/10/2009   Post a comment
Fabless ASIC house eASIC said ARM has successfully validated its next-generation Cortex-A9 MPCore multicore processor using eASIC's Nextreme NEW ASICs.
The final frontier?
Programmable Logic DesignLine Blog  
6/10/2009   Post a comment
I wasn't born at the time Neil Armstrong first walked on the moon. But that event will shape the achievements of my generation as much (if not more so) than those who watched it live on TV.
FPGA startup crunch: Abound banks on roots, density
News & Analysis  
6/10/2009   Post a comment
Executives at FPGA vendor Abound Logic object to the term "startup," because its built on technology and legacy that has been around for many years. The company claims to offer the highest-density FPGAs and is one of several current companies that believes it can overcome the odds to become the first FPGA firm in many years to make it big.
Solving display challenges in mobile internet devices
Design How-To  
6/10/2009   1 comment
This article discusses the market opportunity for low-cost consumer devices that provide users with Internet access and the requirement that such products offer a high-quality display to offer the same user experience as a laptop computer.
Belated happy 5th birthday to the Mars rovers
News & Analysis  
6/10/2009   Post a comment
In February, the Mars rovers celebrated their fifth straight year of operation on the red planet, far exceeding expectations that they would last for three months.
Cabinets, LEDs, and Furnaces (Oh My!)
News & Analysis  
6/10/2009   Post a comment
In which we discover why I find myself reading Pride and Prejudice (by Jane Austin), Hard Times (by Charles Dickens), and...
Book Excerpt: "Electrical Engineering 101" (Part 4 of 5)
Design How-To  
6/10/2009   Post a comment
This is not "EE for dummies"; it is a very useful review of basics you may have forgotten, or maybe missed.
Analyst ups IC forecast as demand grows
News & Analysis  
6/9/2009   Post a comment
Right now, there appears to be marginal improvement in ICs, but no real recovery is still in sight amid the downturn.
Lattice offers auto-temp qualified chip scale 132 BGA packaging for XP2 family
Product News  
6/9/2009   Post a comment
Lattice Semiconductor announced the availability of automotive temperature qualified low-cost chip scale 132 ball grid array packaging for the non-volatile LatticeXP2 FPGA family.
Cypress : Programmable SoCs have touch-sensing interface
Product News  
6/8/2009   Post a comment
Cypress Semiconductor has introduced two PSoC programmable system-on-chips with enhanced analog and digital performance.
Lattice Semi narrows guidance
News & Analysis  
6/5/2009   Post a comment
Lattice Semiconductor narrowed its guidance for the quarter ending July 4, saying it expects revenue of between $43.3 million and $45.5 million, flat to up 5 percent compared with the previous quarter.
MathStar shareholders to consider liquidation
News & Analysis  
6/4/2009   Post a comment
MathStar's board of directors will vote June 29 on a shareholder proposal to liquidate the company, according to a regulatory filing.
Altera offers Stratix IV GX FPGA development kit
Product News  
6/3/2009   Post a comment
Altera announced the availability of the Stratix IV GX FPGA development kit, featuring hardware and software for designs using 40-nm Stratix IV GX FPGAs with integrated 8.5-Gbps transceivers.
Page 1 / 2   >   >>


EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Aging Brass: Cow Poop vs. Horse Doo-Doo
Max Maxfield
38 comments
As you may recall, one of the things I want to do with the brass panels I'm using in my Inamorata Prognostication Engine is to make them look really old. Since everything is being mounted ...

EDN Staff

11 Summer Vacation Spots for Engineers
EDN Staff
11 comments
This collection of places from technology history, museums, and modern marvels is a roadmap for an engineering adventure that will take you around the world. Here are just a few spots ...

Glen Chenier

Engineers Solve Analog/Digital Problem, Invent Creative Expletives
Glen Chenier
11 comments
- An analog engineer and a digital engineer join forces, use their respective skills, and pull a few bunnies out of a hat to troubleshoot a system with which they are completely ...

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
45 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Flash Poll
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)