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Content tagged with FPGA/PLD/CPLD
posted in July 2005
PLD vendor releases open IP core soft MCU
Product News  
7/29/2005   Post a comment
In a move to drive user development of its new 8-bit soft microcontroller core, Lattice Corp. is offering an open IP core license that eliminates the boundaries found in free reference designs that restricts the use of IP.
Flash-based FPGA to integrate analog functions
Product News  
7/27/2005   Post a comment
In the next six to nine months, Actel Corp. will unveil products that employ its latest technology called Fusion, which combines mixed-signal analog capabilities with flash memory and field-programmable gate array (FPGA) fabric in a monolithic programmable system chip (PSC).
Open IP core license available for LatticeMico8 Soft MCU
News & Analysis  
7/27/2005   Post a comment
On the heels of its just released MachXO crossover programmable logic devices, Lattice Semiconductor Corp. is making available under an open IP core license its LatticeMico8, an 8-bit "soft" MCU core for its various families of PLDs and FPGAs.
Stratix II FPGAs available in higher speed grades
Product News  
7/26/2005   Post a comment
Altera Corp. is offering a faster speed grade for the two largest members of its Stratix II field programmable gate array (FPGA) family, the EP2S130 and EP2S180.
Cypress falls short on profit expectations
News & Analysis  
7/21/2005   Post a comment
Semiconductor supplier Cypress Semiconductor Corp. reported a second-quarter net loss of $15.3 million, or 12 cents per share on sales of $220.5 million, compared to earnings of $21.9 million, or 18 cents per share on sales of $264.3 million in the year-ago quarter.
New programmable device family combines CPLD and FPGA features
Product News  
7/19/2005   Post a comment
Lattice Semiconductor Corp. has introduced MachXO, a new product family that combines the key features of complex programmable logic device (PLD) and FPGA technologies in a single device.
Logikchip aktualisiert Software (fast) ohne Betriebsunterbrechung
Product News  
7/18/2005   Post a comment
Als eine neue Klasse programmierbarer Bausteine positioniert Lattice Semiconductor seine programmierbaren Crossover-Logikschaltkreise in die Lücke zwischen CPLDs und FPGAs. Unter der Bezeichnung MachXO soll die Produktfamilie ein breites Anwendungsspektrum von Automobilelektronik über Bus-Bridging-Applikationen bis zu Industriesteuerungen erobern.
ITRS roadmap committee wants to drop term 'technology node'
News & Analysis  
7/15/2005   Post a comment
The 2005 International Technology Roadmap for Semiconductors (ITRS), the roadmap committee is beginning an intentional de-emphasis on describing generations of semiconductor processing technology in terms of technology nodes.
Enhanced IDE helps FPGA designers analyze timing constraints
Product News  
7/13/2005   Post a comment
Actel Corp.'s latest version of its Libero Integrated Design Environment (IDE) features SmartTime static timing analysis technology to enable field-programmable gate array (FPGA) designers to analyze and manage timing constraints.
New utility accelerates Virtex-4 FPGA speeds by 26%
Product News  
7/13/2005   Post a comment
To help designers benchmark and maximize the performance benefits of Virtex-4 and Spartan-3 field-programmable gate arrays (FPGA), Xilinx Inc. is offering the Xplorer utility that when used with RTL level retiming with the company's ISE software claims it can improve Virtex-4 device performance by 26%.
Low-cost programmable SoC integrates full-speed USB port
Product News  
7/13/2005   Post a comment
Cypress Semiconductor Corp. has introduced an enhanced version of its programmable system-on-chip PSoC. In its latest PSoC, the CY8C24794-24LFXI, Cypress has included a full-featured, full-speed USB port. The new device is available for less than $2 each in volume.
Antifuse FPGAs offer cost-effective alternative to rad-hard ASICs
Product News  
7/8/2005   Post a comment
After a year of sampling its antifuse-based RTAX-S FPGA family, Actel is finally shipping fully qualified devices. The antifuse-based RTAX-S devices are Actel's family of radiation-tolerant FPGAs, designed for space applications.
Xilinx sur le point de stimuler son activité FPGA en Inde
News & Analysis  
7/8/2005   Post a comment
Xilinx Inc., fournisseur de réseaux prédiffusés programmables, a fait part de son intention de stimuler ses efforts d’investissements et de recherche à long terme dans ses instituts techniques indiens afin de soutenir l’utilisation généralisée des FPGA en Inde et de développer des outils et des méthodologies applicables pour une durée approximative de quatre ans.
Toolset moves software code to FPGA hardware to quicken embedded system design
Product News  
7/6/2005   Post a comment
Designers working with Xilinx Inc.'s Virtex-4 field-programmable gate arrays (FPGA) can create hardware-accelerated applications that can dramatically outperform applications running on traditional microprocessors with Impulse Accelerated Technologies Inc.'s CoDeveloper C-to-hardware design tool.
DAC—Variations on a Theme
Design How-To  
7/6/2005   Post a comment
Electronic conferences seem to be of two varieties—those that introduce innovative products and methodologies and others that enhance existing solutions. The 42nd DAC fits into the second category. Building upon an existing base of design tools and products is not a bad thing. Improving upon what has been previously introduced marks the point at which those products become usable for the mainstream electronics community. Jim Lipman addresses some of the hot topics that garnered a lot of at
Networking reference design offers TCP/IP connectivity on FPGA platform
Product News  
7/1/2005   Post a comment
Altera Corp. has teamed up with InterNiche and MorethanIP to provide embedded designers with a networking reference design for its Nios II embedded processor.

As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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