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Content tagged with FPGA/PLD/CPLD
posted in August 2006
IRS appeals decision on Xilinx price transfer taxes
News & Analysis  
8/31/2006   Post a comment
The U.S. Internal Revenue Service has filed an appeal in federal court, seeking the overturn of a 2005 U.S. Tax Court decision in favor of leading programmable logic vendor Xilinx, according to a regulatory filing.
How to use FPGAs to implement high-speed RLDRAM II interfaces
Design How-To  
8/30/2006   Post a comment
RLDRAM II devices bridge the gap between DDR SDRAM and SRAM; FPGAs offer a solution that enables FPGA-to-RLDRAM II interface performance to run up to 300 MHz.
'Earth-friendly' Xilinx FPGAs are on-board the 'Earthrace' powerboat
News & Analysis  
8/30/2006   Post a comment
Powered by renewable fuel, the earth-friendly Earthrace vessel sets out to beat the world record for circumnavigating the globe.
Lattice inaugurates sales operations in India
News & Analysis  
8/28/2006   Post a comment
Lattice Semiconductor Corp. has established a sales force and forged partnerships with two major distributors to serve the programmable logic market in India.
Actel claims to be the new low-power leader with its IGLOO family of FPGAs
Product News  
8/28/2006   Post a comment
With only 5uW of static power consumption, Actel says its IGLOO family of flash-based FPGAs represents a true alternative to ASICs and CPLDs.
Actel aims low-power FPGAs toward mobile apps
Product News  
8/28/2006   Post a comment
Claiming to offer the industry's lowest-power FPGAs, Actel rolled out the Igloo family of products, targeting the tight power budgets of the portable market.
"Do's and Don'ts" when considering an FPGA to structured ASIC design methodology
Design How-To  
8/24/2006   Post a comment
FPGA prototyping is more successful for structured ASICs compared to standard cell ASICs when the structured ASIC mirrors the resources available on the FPGA.
Xilinx: options investigation finds no fraud
News & Analysis  
8/15/2006   Post a comment
An investigation into historical stock options granting practices at programmable logic giants Xilinx has concluded, finding no evidence of fraud in the company's practices, according to a regulatory filing.
FPGA Architectures from 'A' to 'Z' : Part 1
Design How-To  
8/15/2006   Post a comment
If you are new to FPGAs, there are a bewildering number of different architectures and related concepts; but fear not, because this tutorial explains all.
Interlaken IP core tailored for Stratix II GX FPGAs
Product News  
8/15/2006   Post a comment
Altera, Sarance Technologies and Cortina Systems have teamed up to develop the first FPGA-based Interlaken IP core aimed at accelerating the design of network systems applying the emerging protocol. The Interlaken protocol IP core is available for 10-, 24- and 40-Gbits/s interconnect designs, and can scale to 100-Gbits/s and higher for future systems.
Altera, Finnish firm offer development kits for OBSAI design
News & Analysis  
8/15/2006   Post a comment
Claiming an industry first, programmable logic supplier Altera and wireless technology specialist Elektrobit Group announced the availability of development kits for designing applications in compliance with the Open Base Station Architecture Initiative (OBSAI) Reference Point 3-01 (RP3-01) specification for remote RF heads.
FPGA-based OBSAI RP3-01 development kits for wireless base station designs
Product News  
8/15/2006   Post a comment
Altera and Elektrobit have teamed to offer the first FPGA-based Open Base Station Architecture Initiative (OBSAI) RP3-01 development kits.
First Interlaken protocol IP core for FPGAs
Product News  
8/14/2006   Post a comment
Altera, Sarance Technologies, and Cortina Systems have joined forces to create the first Interlaken protocol IP core for FPGAs.
Designing control circuits for FPGA-based DSP systems
Design How-To  
8/11/2006   Post a comment
Need to design a control circuit for your FPGA-based DSP system? These simple techniques could save you days of work. Topics covered include data-driven multiplexing, finite state machines, sample rate control, pattern generation, and low-rate control algorithms.
FPGAs top choice for some telecom equipment, survey says
News & Analysis  
8/11/2006   Post a comment
Attracted by the flexibility that FPGAs provide once deployed in the field, telecom equipment manufacturers are relying more on FPGAs than ASICs for low- to medium-volume production of telecom systems, according to results of a worldwide survey of product engineers and designers.
Altera to delay another quarterly filing
News & Analysis  
8/10/2006   Post a comment
Programmable logic supplier Altera said it expects to delay another regulatory filing.
Low-cost LatticeECP2 FPGAs support high-speed SPI 4.2 interface
Product News  
8/8/2006   Post a comment
Lattice has developed an SPI-4.2 soft IP core for its LatticeECP2 FPGAs. The product is said to be the first low-cost solution on the market that supports the Optical Internetworking Forum's (OIF) System Packet Interface Level 4 (SPI-4) Phase 2 Standard, a parallel interface found in telecom and datacom applications at 10-Gbits/s rates and below.
Lattice claims low cost programmable SPI-4.2 solution
News & Analysis  
8/7/2006   Post a comment
Lattice Semiconductor announced the availability of what it claims is the industry's only full-rate SPI-4.2 solution based on a low cost FPGA fabric.
Training courses cover OFDM, FPGAs for DSP
Design How-To  
8/4/2006   Post a comment
Technical training firm hueggenberg gbr is offering two new short courses, "DSP for FPGAs" and "OFDM for Advanced Wireless Communications." The courses are offered at locations in Germany, Italy, Scotland, and Switzerland.
The 'nuts and bolts' of Integrating PCI Express into your design
Design How-To  
8/3/2006   Post a comment
This paper summarizes the issues and decisions required when integrating a full PCI Express (PCIe) solution into a chip design (ASIC, Structured ASIC, or FPGA).
Lattice enters the "blogosphere"
News & Analysis  
8/1/2006   Post a comment
While FPGAs are expected to be a popular subject for a new series of blogs, all Lattice and Lattice-related topics will open for discussion.

As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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