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Content tagged with FPGA/PLD/CPLD
posted in August 2008
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Bebop to the Boolean Boogie EDITION #3
Programmable Logic DesignLine Blog  
8/29/2008   Post a comment
The only electronics book where you can simultaneously learn about state machines, musical socks, Reed-Muller logic, and the best time of the day to eat smoked fish!
Cool application for iPhone and iPod touch : FatWatch
Programmable Logic DesignLine Blog  
8/29/2008   Post a comment
This software tool looks rather cool; if I actually owned an iPhone or an iPod touch I would certainly use this little rapscallion!
The Hacker's Diet (Part Deux)
Programmable Logic DesignLine Blog  
8/28/2008   Post a comment
I've started to use some free weight-logging tools and they are really useful!
USB History and Direction
Programmable Logic DesignLine Blog  
8/28/2008   Post a comment
My blogs on USB seem to have sparked a flurry of interest and responses...
It’s time to vote...
Programmable Logic DesignLine Blog  
8/28/2008   Post a comment
...on a new tagline for Newnes' engineering books. Here are the top 10 entries, now it's over to you...
USB 2.0 may not be "High Speed"; USB 3.0 may not be "SuperSpeed"
Programmable Logic DesignLine Blog  
8/28/2008   Post a comment
A reader notes that although "High Speed USB" = USB 2.0, the opposite is not necessarily true; that is, a USB 2.0 compliant device may not support "High Speed."
FPGA architecture patent granted to systems and IP company
News & Analysis  
8/28/2008   1 comment
NASDAQ-listed O2 Micro International Ltd. (George Town, Cayman Islands), a company with offices in Taiwan and China, has been granted U.S. patent number 7,391,237 for its field programmable gate array architecture upgrade.
Clones R Us
Programmable Logic DesignLine Blog  
8/27/2008   1 comment
Have you visited the Dream Technologies International website, which boasts that you can order human or animal clones...
The Hacker's Diet
Programmable Logic DesignLine Blog  
8/27/2008   Post a comment
The definitive guide on how to lose weight and hair through stress and poor nutrition!
Implementing an FPGA / PCB co-design process
Design How-To  
8/27/2008   Post a comment
An FPGA interface design without PCB process integration or PCB routing consideration can lead to increased PCB costs and extended design times.
Configurable video platform for LatticeECP2 FPGAs
Product News  
8/27/2008   Post a comment
Arrow Electronics and Exor/Sitek International have developed a flexible image-processing platform that includes boards and IP for the LatticeECP2 FPGA.
A goat by any other name...
Programmable Logic DesignLine Blog  
8/26/2008   Post a comment
It's not often a joke makes me laugh out loud, but this one managed the trick...
Is there a specification for writing specifications?
Programmable Logic DesignLine Blog  
8/26/2008   3 comments
A reader poses an interesting problem for us to ponder...
Dolby Pro Logic II/IIx decoders added to Tensilica's codec library
Product News  
8/26/2008   1 comment
Tensilica adds Dolby Pro Logic II and Pro Logic IIx decoders to its Xtensa HiFi 2 audio engine codec library for home entertainment and automotive audio products.
Broadcast video demos interface to Xilinx and Altera FPGAs
News & Analysis  
8/26/2008   Post a comment
Two of National Semiconductor's broadcast video demonstrations at the forthcoming IBC will include interfacing to Xilinx and Altera FPGAs.
Agilent to present webinar on Logic Analyzer Basics
News & Analysis  
8/25/2008   Post a comment
Forthcoming webinar from Agilent Technologies will cover the fundamentals of logic analyzers, including probing and cross-correlation to oscilloscopes.
RTOS Support for Xilinx PowerPC 440 Processor on Virtex-5 FPGA
Product News  
8/25/2008   Post a comment
Express Logic and Avnet say the Avnet XC5VFX30T board and Xilinx Virtex-5 Embedded kit (ML507 board) now run the ThreadX RTOS.
Lattice ispLEVER Classic design tools support new CPLD family
Product News  
8/25/2008   Post a comment
The ispLEVER Classic design tools from Lattice Semiconductor now provide full production support for ultra-low-power ispMACH 4000ZE CPLDs.
Know your British Policeman
Programmable Logic DesignLine Blog  
8/25/2008   Post a comment
A friend just sent me a link to a hilarious website that had me chortling happily and brightened my afternoon.
MATLAB to C using MCS: Advanced topics
Design How-To  
8/24/2008   Post a comment
We highlight advanced topics in MATLAB to C conversion using the mixture-of-Gaussians background subtraction method.
Intel aims at set-top-boxes
Signal Processing DesignLine Blog  
8/22/2008   1 comment
Intel's new processor takes aim at the set-top-box market. Will set-top-box king MIPS fend them off?
Now, this is getting creepy...
Programmable Logic DesignLine Blog  
8/22/2008   Post a comment
Have you seen the "Emily Isn't Real But Would You Have Guessed?" article and video? This is strangely creepy and weird...
Free phase-locked loop (PLL) analysis software
Product News  
8/21/2008   Post a comment
This free PLL analysis software from Agilent Technologies is PCI-SIG approved for PCI Express 2.0 compliance testing.
Actel's FPGAs achieve rigorous SAE/AS9100 aerospace certification
Product News  
8/21/2008   Post a comment
Actel says that it is the first programmable logic vendor to obtain SAE/AS9100 aerospace certification for its FPGAs.
USB 3.0 is almost here and I can't wait!
Programmable Logic DesignLine Blog  
8/21/2008   Post a comment
USB 1.0 was pretty clever; USB 2.0 really made my world a happier place; and now USB 3.0 is set to blow my socks off!
Fresco Logic demos first super-speed USB 3.0 on FPGA-based development platform
Product News  
8/21/2008   Post a comment
USB 3.0 development platform is based on a Xilinx Virtex-5 FPGA device implementing Fresco Logic's SuperSpeed USB Host and Device Controller IP.
Microcontroller Design in FPGAs
Design How-To  
8/20/2008   1 comment
The union of Microcontroller Unit (MCU) intellectual property (IP) cores with FPGAs provides a far more flexible hardware platform than traditional MCU ASSPs.
Free web-based screen reader for the visually impaired
Programmable Logic DesignLine Blog  
8/20/2008   Post a comment
Do you know someone who has problems seeing/reading computer screens and who travels a lot? If so, this could be very interesting for them...
Arrow offers ARM processor options for Altera FPGAs
Product News  
8/20/2008   Post a comment
Arrow Electronics' ASIC design services and IP delivery mechanisms bring ARM technology options to Altera Stratix FPGAs and HardCopy Structured ASICs.
Engineer builds his own spacecraft
News & Analysis  
8/20/2008   Post a comment
Intel project engineer Morris Jarvis is designing his own spacecraft called Hermes to take space tourists to the edge of the atmosphere.
Half-price FPGA "How-To" training videos
Programmable Logic DesignLine Blog  
8/19/2008   Post a comment
What do the Beijing Olympics have to do with a special half-price offer for nineteen step-by-step FPGA "How To" training videos? Read on...
Low-cost PCIe DVR add-in cards based on software configurable processors
Product News  
8/19/2008   Post a comment
Full D1 H.264 encoding using software configurable processors from Stretch Inc. provides a low-cost compression solution for video surveillance OEMs and system integrators.
Who's the biggest looser?
Programmable Logic DesignLine Blog  
8/19/2008   Post a comment
Well, it's taking a lot of work, but I'm getting there...
Mentor Graphics and Altera Partner on DO-254
News & Analysis  
8/19/2008   Post a comment
Mentor joins Altera's DO-254 Global Partner Network; announces joint development of DO-254-certifiable IP.
The Mojave Experiment
Programmable Logic DesignLine Blog  
8/18/2008   1 comment
Well, I don't know about you, but this brought a wry grin to my face.
Mixed-signal design tool supports automotive power management devices
Product News  
8/18/2008   Post a comment
New mixed-signal design tool from Lattice supports automotive versions of its Power Manager, Power Manager II, and ispClock devices.
Processor-FPGA co-design accelerates software applications in hardware
Design How-To  
8/18/2008   Post a comment
C-to-Xilinx Virtex FPGA design and partitioning tools to be showcased by Impulse Accelerated Technologies at the Intel Developer Forum in San Francisco.
Now that's low power!
Signal Processing DesignLine Blog  
8/17/2008   Post a comment
You want low power? How does 27 uW/MHz sound? That's what Cambridge Consultants is claiming for its new XAP5 processor.
Background subtraction, part 2: MATLAB to C using MCS
Design How-To  
8/17/2008   Post a comment
In part 2 of this series, we convert our three background subtraction models from MATLAB to C using Agility's MCS tool.
Cool Stuff (I want it, I need it, I must have it!)
Programmable Logic DesignLine Blog  
8/14/2008   Post a comment
Once I have these Miracle Berry Fruit Tablets in my hand, my revenge will be so sweet!
How to analyze and reduce power using Libero IDE
Design How-To  
8/13/2008   Post a comment
Meeting low power FPGA design specifications requires automatic power reduction capabilities coupled with sophisticated power analysis features.
Some more mega-cool videos
Programmable Logic DesignLine Blog  
8/13/2008   Post a comment
Here, for your delectation and delight, is a further collection of cool videos and flash animations.
Surface-mount resonators housed in tiny package
Product News  
8/13/2008   Post a comment
Raltron Electronics Corp. has unveiled its R2016 series of surface-mount resonators in a 2.0 x 1.6 x 0.5-mm package.
Capacitive control and proximity detection TNG
Programmable Logic DesignLine Blog  
8/12/2008   Post a comment
How capacitive control and proximity detection can help the aging with regard to using the many electronic products in their homes.
Tundra introduces multi-standard RapidIO evaluation platform with Texas Instruments and Altera
Product News  
8/12/2008   Post a comment
The platform allows customers to use the RapidIO protocol for DSP or processor aggregation, while leveraging the Tsi620's hardware bridging to low cost PCI-enabled processors.
It's a great day to be alive
Programmable Logic DesignLine Blog  
8/12/2008   Post a comment
Sometimes we have to remind ourselves to slow down and smell the roses.
Why I hate passwords
Signal Processing DesignLine Blog  
8/11/2008   1 comment
Passwords are a pain. When will we get biometrics?
XLoom leverages Altera FPGA development kit for energy, cost savings
Product News  
8/11/2008   Post a comment
Altera Corp. has announced XLoom Communications is leveraging its Stratix II GX FPGA signal integrity development kit to provide a unique BER testing environment that reduces costs and lab space while providing an energy savings.
2GB USB 2.0 Flash memory stick for $12
Programmable Logic DesignLine Blog  
8/11/2008   Post a comment
You could have knocked me over with a feather when I discovered how far prices have fallen for USB 2.0 flash memory sticks.
IP camera reference design features powerful configurable processor
Product News  
8/11/2008   Post a comment
New low-power device and ultra-compact reference design deliver what Stretch is calling breakthrough performance and price point to the surveillance market.
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