Breaking News
Content tagged with FPGA/PLD/CPLD
posted in September 2003
Xilinx goes to bat for Taiwan foundry
News & Analysis  
9/23/2003   Post a comment
Xilinx Inc. is taking a more forthright position in the comeback campaign of foundry United Microelectronics Corp., averring that UMC and IBM Corp. are equals in technology development and reiterating its strategy to stick with UMC for high-volume manufacturing.
Military-qualified FPGAs hit densities up to million gates
Product News  
9/18/2003   Post a comment
Actel Corp. says its reprogrammable, nonvolatile ProASIC Plus field-programmable gate arrays (FPGAs) have been tested and verified to operate over the full military temperature range of -55 degrees C to +125 degrees C.
2003 semi outlook brightens a bit
News & Analysis  
9/17/2003   Post a comment
The market research firm iSupply Corp. on Tuesday tweaked its outlook for 2003 semiconductor sales and revealed vendor rankings for the first half of the year, with newly formed Renesas Technology coming in as the third-largest chip maker in the world.
Altera to ride TSMC's 90-nm process
News & Analysis  
9/15/2003   Post a comment
Programmable Logic Devices offer co processor muscle for high bandwidth image processing " Part 2
News & Analysis  
9/9/2003   Post a comment
In medical imaging applications, such as Computed Tomography and Magnetic Resonance Imaging, the input data is not a stream of successive bytes, but rather it is a large data block (an image) residing in memory or on disk. The task of the image processing chain is typically to tile the image into sub-blocks, perform a series of linear algebraic transforms on those blocks, and place the resultant data back on the disk. In the second part of this series, an Altera engineers offers on configuring a
Xilinx adds zip to PLD design software
News & Analysis  
9/8/2003   Post a comment
Xilinx Inc. today will release an update to its PLD design software the company said will make its chips more competitive with structured ASICs.
Configuring Success, Minimizing Risk: Upstart DSP Architectures Aim at Elegance, Ease of Use
News & Analysis  
9/3/2003   Post a comment
Design specs that increasingly demand high performance and low power consumption are forcing IC designers to explore relatively uncharted architectural territory. Dual-core designs and multi-million-gate FPGAs are unfamiliar enough for most design teams. Few options are more bewildering than configurable processors—especially when signal processing is involved.


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