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posted in September 2002
Shared, Switched, or Networked? The Uncharted Future of On-Chip Buses
Design How-To  
9/24/2002   Post a comment
Scrambling to keep up the the spiraling bandwidth requirements of high-speed processing cores, SoC designers are looking at various on-chip bus options. Jack Shandle describes three bus flavors—shared, switched, and networked—and discusses how some major microprocessor core and silicon IP companies are addressing the problem of moving data on silicon.


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