Intel outlines 3-D NAND transition Design How-To 5/24/2013 10 comments Intel and IM Flash Technologies executive says 2-D NAND flash memory can scale to 10-nm and that 3-D NAND needs to be manufactured with at least 32 layers to be economic.
In conjunction with unveiling of EE Times’ Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. One of Silicon Valley's great contributions to the world has been the demonstration of how the application of entrepreneurship and venture capital to electronics and semiconductor hardware can create wealth with developments in semiconductors, displays, design automation, MEMS and across the breadth of hardware developments. But in recent years concerns have been raised that traditional venture capital has turned its back on hardware-related startups in favor of software and Internet applications and services. Panelists from incubators join Peter Clarke in debate.