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Content tagged with Memory/Storage
posted in June 2013
Startup Touts Non-Volatile Memory for Logic Process
News & Analysis  
6/28/2013   10 comments
Rangduru is a California-based fabless chip company startup that is working on non-volatile memory in both discrete and embedded forms.
Memory scaling: A systems architecture perspective
Design How-To  
6/24/2013   Post a comment
Scaling approaches include cooperation across multiple levels of the computing stack, including software, microarchitecture, and devices.
STMicro signs memory design agreement with Rambus
News & Analysis  
6/24/2013   1 comment
Multifaceted agreement expands existing licenses between the two companies and settles all outstanding claims.
DRAM market consolidates, gains in stability
News & Analysis  
6/24/2013   Post a comment
Production is expected to decline by 24% to 13 million this year, according to IHS.
Tuning phase-change memory for low-power applications
Design How-To  
6/24/2013   1 comment
Advances in phase-change memory materials cut programming current levels.
IMEC helps scale NAND flash below 20-nm
News & Analysis  
6/21/2013   5 comments
IMEC has produced a multilayer inter-gate dielectric that opens up operational voltage windows for planar NAND flash memory structures below 20-nm.
The future of charge-trapping flash memory
Design How-To  
6/17/2013   3 comments
Charge-trapping technology supports NAND flash, NOR flash, and 3-D architectures.
Toshiba, TSMC report ROMs with multi-level cells
News & Analysis  
6/17/2013   Post a comment
Toshiba, TSMC both reported multi-bit per memory cell ROMs at the Symposium on VLSI Circuits held in Kyoto, Japan, last week.
ST EEPROMs guarantee 4 million erase/write cycles
Product News  
6/13/2013   Post a comment
At that endurance level, ST’s latest EEPROMs give designers extra freedom to update stored data more frequently and extend system lifetime.
Five trends spotted at this year’s Computex
Blog  
6/12/2013   7 comments
Attendance of Computex ended this week was flat compared to a year ago. But this year’s Computex was more revealing than met the casual eye, with signs of the changing dynamics in the industry.
Microchip rolls out unique-ID EEPROMs
Product News  
6/11/2013   Post a comment
Pre-programmed 32-bit serial number can be extended to other lengths.
Scaling NAND flash to 20-nm node and beyond
Design How-To  
6/10/2013   3 comments
Replacing conventional wrap floating gate with high-K/metal gate yields NAND flash that can easily reach 15-nm node.
Microchip’s 24AA02UID, 24AA025UID, 11AA02UID, 25AA02UID and 24AA256UID unique ID family of EEPROMs debuts
Product News  
6/6/2013   Post a comment
The chip maker has also added EUI-64 options to MAC-address family of EEPROMs for easy and low-cost access to IEEE MAC addresses.
Microchip to acquire embedded memory IP supplier
Design How-To  
6/5/2013   1 comment
Acquisition of Novocell by Microchip subsidiary Silicon Storage Technology expands Microchip's flash memory IP offering.
How to use ECC to protect embedded memories
Design How-To  
6/4/2013   Post a comment
Multi-bit error correction and automation can help meet reliability and volume production goals.
Memory markets to grow up to 30% in 2013
Blog  
6/4/2013   9 comments
The biggest surprise isn't revenue numbers but an extraordinary prediction for the future of DRAM.
How do we make 3-D NAND flash practical?
Design How-To  
6/3/2013   4 comments
Discover the key challenges that need to be solved to enable 3-D memory, and one implementation that might just fit the bill.
SMIC forms joint venture for 28-nm chip production
News & Analysis  
6/3/2013   11 comments
Some $3.6 billion funding has been earmarked for SMIC joint-venture to focus on 45-nm and finer geometry manufacturing.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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