Interconnect pushed China super to #1 News & Analysis 10/28/2010 26 comments A homegrown, ultrafast interconnect chip set was part of the secret sauce behind the Tianhe-1a, the first China-built system to be named the world's fastest supercomputer.
Intel backs cloud computing alliance News & Analysis 10/27/2010 6 comments Intel through its clout behind cloud computing, pledging to help drive the creation of standards, including participation in an alliance of global businesses.
ARM TechCon Teardown Smackdown: Dell Streak vs. The Archos 7 Blog 10/26/2010 11 comments The promo for this ARM TechCon event is actually a bit misleading: “Which tablet PC will come out on top? Watch as EE Times Editors Brian Fuller and Patrick Mannion dissect the inner workings of the devices and explore which is the strongest contender, based on speed, power consumption, display, features and functionality.”
Intel confirms new Oregon R&D fab News & Analysis 10/19/2010 17 comments Intel has confirmed speculation that it will build a new R&D wafer fab in Hillsboro, Ore., and upgrade other existing U.S. facilities for 22-nm production at a total investment of between $6 billion and $8 billion.
Analysts lukewarm on Intel after Q3 report News & Analysis 10/13/2010 20 comments Wall Street analysts gave generally mixed reviews to Intel's third quarter earnings report, saying the company's sales target for the fourth quarter was better than feared, but suggesting that the company still faces some headwinds.
Otellini throws down gauntlet in tablets News & Analysis 10/12/2010 32 comments Intel chief executive Paul Otellini threw down the gauntlet in tablets, the one soft spot in an otherwise solid quarter for the microprocessor giant despite a somewhat sluggish market.
ARM, SMIC extend partnership to 40-nm node News & Analysis 10/11/2010 2 comments Processor intellectual property licensor ARM Holdings plc and Chinese foundry Semiconductor Manufacturing International Corp. (SMIC) have announced an agreement to collaborate on the development of a physical IP library platform for SMIC 65-nm LL and 40-nm LL technology process nodes.
Processor reorder buffer timeout - a debug guide Design How-To 10/10/2010 4 comments This paper provides an overview of the Processor Reorder Buffer timeout and provides methodology to debug these types of system issues. Using the debug methods and debug tools suggested in this document should help reduce the
time to debug these system issues. The process is to gather more information about the failure until the cause is identified and then put preventive steps in place to eliminate the failure.
CPU technologist sues patent pool firms News & Analysis 10/4/2010 32 comments Microprocessor technologist Charles H. Moore (Chuck Moore) has announced he has filed a law suit against patent licensing firms Technology Properties Ltd. LLC (The TPL Group) and Alliacense LLC alleging fraud, breach of fiduciary duty, and breach of contract.
Open-source multicore processor project begins News & Analysis 10/1/2010 53 comments ORSoC AB, a Swedish design house that took over responsibility for maintaining the OpenCores website in 2007, has announced that work has begun on OpenRISC 2000 (OR2K), an upgrade to the open-source OpenRISC 1000 32-bit processor.
As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.
January 2016 Cartoon Caption ContestBob's punishment for missing his deadline was to be tied to his chair tantalizingly close to a disconnected cable, with one hand superglued to his desk and another to his chin, while the pages from his wall calendar were slowly torn away.122 comments