Shared, Switched, or Networked? The Uncharted Future of On-Chip Buses Design How-To 9/24/2002 Post a comment Scrambling to keep up the the spiraling bandwidth requirements of
high-speed processing cores, SoC designers are looking at various on-chip bus options. Jack Shandle describes three bus flavorsshared, switched, and networkedand discusses how some major microprocessor core and silicon IP companies are addressing the problem of moving data on silicon.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.