Who’s managing your power management? Design How-To 2/4/2013 1 comment After reviewing requests to integrate power management functions into a single chip, JVD concluded that many companies focus on watts and ignore cost. Money is being wasted by not taking advantage of further integration. This paper intends to create an awareness of this potential savings.
My brain hurts! Programmable Logic DesignLine Blog 2/4/2013 20 comments I'm having some difficulty wrapping my brain around a question that just came winging its way across the Internet to me.
London Calling: ST's world of pain Blog 2/4/2013 6 comments ST, despite having announced its decision to get out of the struggling joint venture ST-Ericsson in December, has reported more losses, more JV-related costs and forecast a poor first quarter of 2013.
Planning to fail is planning to fail Blog 2/1/2013 8 comments Hardware teams understand the importance of planning, but does the act of project planning guarantee success to the same degree that avoiding project planning guarantees failure?
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.