Datenpfad-Tools schaufeln auf dem Chip Platz frei News & Analysis 6/1/2005 Post a comment Wer beim Chip-Design mit knappen Platzvorgaben kämpfen muss, kann sich jetzt freuen: Das Startup-Unternehmen Arithmatica bringt jetzt seine ersten EDA-Tools auf den Markt, mit denen Entwickler bis zu 40 Prozent Platz im Chip sparen können.
Meter measures UMTS RF field strength Product News 6/1/2005 Post a comment With increasing public concern over the proliferation of 3G mobile phone towers, this UMTS software upgrade for the Narda SRM-3000 selective radiation meter enables it to measure field strength from individual UMTS cells at a shared antenna site.
From SID, 3D and more Blog 6/1/2005 Post a comment I was pleasantly surprised to see the extent to which small-time, garage-style inventors are still a factor in what is arguably the most cutting-edge aspect of video displays: 3D.
New 3D Displays at SID Design How-To 6/1/2005 Post a comment A number of 3D exhibits were on display at the Society for Information Displays conference in Boston, including some that required no special glasses.
An introduction to semiconductor technologies for power management - Part 1 Design How-To 6/1/2005 Post a comment Power management is generally accomplished by a combination of small signal transistors acting as the brain, power transistors acting as solid state switches that control the power flow from the source to the load, and passive components like resistors, capacitors, and inductors, acting as sensing and energy storing elements. Fairchild Semiconductor's director of product planning " and frequent Planet Analog contributor " Reno Rossetti offers this tutorial on the fabrication processes and transi
Upgraded FPGA design tool boosts logic performance by 15% Product News 6/1/2005 Post a comment The PlanAhead design and analysis tool that supports Virtex-4 platform and Spartan-3 FPGA families has been upgraded with several new features that enable engineers to find and fix problems even earlier in the design process than previous versions. The PlanAhead 7.1 tool's enhancements include metric maps, gate-level floor planning, an intuitive user interface, and improved accuracy of timing analysis.
Battle-hardened veterans of the electronics industry have heard of the “connected car” so often that they assume it’s a done deal. But do we really know what it takes to get a car connected and what its future entails? Join EE Times editor Junko Yoshida as she moderates a panel of movers and shakers in the connected car business. Executives from Cisco, Siemens and NXP will share ideas, plans and hopes for connected cars and their future. After the first 30 minutes of the radio show, our listeners will have the opportunity to ask questions via live online chat.