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posted in January 2003
Taking on the 130nm node and beyond
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1/13/2003   Post a comment
Texas Instruments' ASIC design team has been designing large, high-performance chips at the 130nm node for over two years.
Software takes center stage to meet vital SoC goals
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1/13/2003   Post a comment
ASIC vendors are in the software business — and not just as a nice sideline.
SoC technical difficulties ahead; stand by
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1/13/2003   Post a comment
Despite the assurances of foundries, ASIC vendors and tool suppliers that the problems with 130-nanometer CMOS are well in hand and that 90 nm is ready to use, there is a rumbling of voices from experienced design teams that not all is well.
SOC Road Map
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1/13/2003   Post a comment
Next generation SoCs: optimized IP platforms
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Consumer demand for more functionality, higher performance and lower cost adds greater continual pressure on SoC manufacturers.
Lessons learned from extending 0.12 µm CMOS for multimillion gate, IP designs
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Complexity is very high with multimillion-gate, IP rich designs in CMOS12, involving many components in the nanometer SoC manufacturing chain.
Future success of SoCs and platforms lies in verification
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Market demands for high integration and high functionality have driven most silicon devices to become SoC devices.
Async chip design eases process shift
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We knew that our innovative asynchronous chip architecture could improve system efficiency by increasing performance and decreasing power consumption.
Advanced library format "attacks" advanced design issues
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Traditionally, ASIC design has been focused almost exclusively on timing closure.
Adapting an architecture to fit 130 nm
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Designing picoChip's new communications processor chip, the PC101, which arrived in first silicon in November, taught us that using 0.13-micron processes is a lot more difficult that our engineers expected, though no one thought it would be easy.
1T-SRAM improves yield, benefits SoCs
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1/13/2003   Post a comment
Embedded memory has become essential for achieving greater bandwidth and faster processing in SoC designs at 0.13 µm and below. Parts Search

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What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.

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