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posted in January 2006
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Spice simulator supports Sandwork tools
News & Analysis  
1/31/2006   Post a comment
Startup simulation and analysis solution provider Nascentric said its Nascim fast-Spice simulation tool now supports Sandwork Design's Spice Explorer and WaveView Analyzer.
Mentor adds verification expert
News & Analysis  
1/31/2006   Post a comment
Harry D. Foster, chairman of Accellera's formal verification committee and chairman of the IEEE-1850 PSL working group, has joined Mentor Graphics' Design Verification and Test division as principal engineer.
EDA product aids multi-voltage design processes
Product News  
1/31/2006   Post a comment
ArchPro Design Automation announces two new products to aid with multi-voltage design processes. The two new products allow designers for the first time to verify voltage states and implement voltage states.
Xpedion adds 64-bit support to Golden Gate simulator
News & Analysis  
1/30/2006   Post a comment
Xpedion Design Systems released the latest version of its GoldenGate simulator, which the company said includes capabilities such as running Monte Carlo analysis on parallel machines, simulation time reduction, improved memory efficiency, improved workflow and 64-bit support.
Startup supporting AMBA protocol
News & Analysis  
1/30/2006   Post a comment
EDA startup Silistix announced support for the on-chip AMBA bus protocol with its Chain synthesized self-timed interconnect technology.
Agilent claims faster extraction through IC-CAP
Product News  
1/30/2006   Post a comment
Calling it a major breakthrough in device modeling speed and efficiency, Agilent Technologies said device modeling engineers are reporting extraction flow improvements of up to 50 percent when using the new modeling algorithms and data interface in the company's Integrated Circuit Characterization and Analysis Program.
The end of programming as we know it?
Blog  
1/30/2006   2 comments
Morgan Björkander of Telelogic thinks it is time for embedded designers to commit totally to model-driven development in the face of the challenges that face them.
Cadence's 'Catena' rolls layout optimizer
News & Analysis  
1/30/2006   Post a comment
Harvesting the first fruits from its secretive Catena development project, Cadence Design Systems this week is rolling out Chip Optimizer, a post-route interconnect optimization tool.
I/O planning ensures IC packaging success
Design How-To  
1/30/2006   Post a comment
Package-aware, I/O planning is becoming essential for designers of today's SoCs, says Egino Sarto, CTO at startup Rio Design Automation. He provides an overview of I/O planning and shows what designers need to know.
EDA stocks rebound from fall
News & Analysis  
1/27/2006   Post a comment
EDA stocks bounced back nicely this week from the dramatic drop on Jan. 20, with Cadence Designs Systems and Synopsys each posting solid gains to finish the week in positive territory.
System prototyping provider names Korean distributor
News & Analysis  
1/27/2006   Post a comment
Embedded system design automation provider Vast Systems Technology named Davan Tech as distributor of Vast's virtual system prototyping solutions in the Korean market.
Calypto names former LSI Logic exec CEO
News & Analysis  
1/27/2006   Post a comment
EDA startup Calypto Design Systems named 20-year semiconductor industry veteran Tom Sandoval CEO
Mentor posts record 4Q results
News & Analysis  
1/26/2006   Post a comment
Mentor Graphics reported a net income of $15.42 million on company-record fourth quarter revenue of $221.3 million, exceeding prior revenue guidance of $220 million for the quarter.
Denali offering simulation models for Micron NAND flash
Product News  
1/26/2006   Post a comment
Denali Software announced the availability of Micron Technology NAND flash simulation models, developed in cooperation with Micron's flash engineering group.
Cooley: EDA startup Tera Systems 'missing in action'
News & Analysis  
1/26/2006   Post a comment
Deepchip.com moderator John Cooley's latest posting openly wonders if Tera Systems, the EDA startup that was chosen "Semiconductor Entrepreneurial Company of the Year” in 2004 by consultant Frost & Sullivan, has shut its doors.
Magma lashes out following latest Synopsys filing
News & Analysis  
1/25/2006   Post a comment
Magma Design Automation reacted strongly to the latest legal maneuver by Synopsys, characterizing a Synopsys filings as attempts to "avoid the consequences" of antitrust violations.
Firms expanding Japanese presence
News & Analysis  
1/25/2006   Post a comment
Virtual system prototyping solution provider Carbon Design Systems has opened a direct sales office in Tokyo, while power consumption EDA tool vendor Azuro has contracted with a Japanese distributor.
Synopsys, Denali claim PCI Express 2.0 IP firsts
News & Analysis  
1/24/2006   Post a comment
Synopsys claimed that its portfolio of DesignWare digital controller intellectual property for PCI Express is the first to support the evolving 2.0 version of the PCI Express specification. Rival EDA and IP vendor Denali Software followed suit by claiming that its PureSpec product is the first verification IP to support Gen II.
Chinese design competence on the rise, according to report
News & Analysis  
1/24/2006   Post a comment
Design competence in China continues to steadily progress as printed circuit board design replaced system design as the most common type of electronics design in the nation in 2005, according to a recent report from Gartner Dataquest.
Former Cadence exec tapped to head SI startup Optimal
News & Analysis  
1/24/2006   Post a comment
EDA signal integrity startup Optimal Corp. named former Cadence Design Systems executive and 20-year industry veteran David DeMaria CEO and appointed him to the company's board of directors.
EDA companies tout involvement with Japan's STARC
News & Analysis  
1/24/2006   Post a comment
Mentor Graphics announced a joint development agreement with Japan's STARC R&D consortium, while startups Fishtail Design Automation and Apache Design Solutions said they are part of STARC's latest production flow.
Design libraries allow RF and DSP codesign
Product News  
1/24/2006   Post a comment
Agilent has developed two more libraries for its ADS software, one for mobile WiMAX and another for 802.11n.
Firms collaborating on programmable IP for vertical markets
News & Analysis  
1/24/2006   Post a comment
Electronic system level tool provider Celoxica said it would collaborate with Synoro Technologies India to develop programmable intellectual property IP solutions for vertical market applications.
Five join Magma partner program
News & Analysis  
1/23/2006   Post a comment
Magma Design Automation's partner program, MagmaTies, has added five new members -- Aragio Solutions, Arteris, Go2silicon SiWave and Soft Mixed Signal.
Tool claims dramatic reduction in OPC closure time
News & Analysis  
1/23/2006   Post a comment
Claiming to offer optical proximity correction closure in a fraction of the time of conventional tools and methods, design-for-manufacturing startup Aprio Technologies introduced a new tool that makes available the lithography rule check repair technology used by the company's Halo-OPC product to manufacturers using third-party LRC and OPC tool sets.
Chip assembly challenges and solutions
News & Analysis  
1/23/2006   Post a comment
Today's hierarchical design approaches complicate chip assembly, says Sierra Design CTO Shankar Krishnamoorthy. He discusses common problems with chip assembly and presents an approach to solve them.
Stocks: Xilinx, EDA companies pummeled
News & Analysis  
1/20/2006   Post a comment
The Big Three EDA companies and programmable logic supplier Xilinx were among many companies that took it on the chin as the Nasdaq composite index dropped 2 percent.
Verification closure tool promises 'total' control
Product News  
1/20/2006   Post a comment
TransEDA hopes to make a splash at next week's Electronic Design and Solution Fair with a tool promising "total" measurement and control of the digital design verification process.
Tool suite adds multi-clocking, clock gating
Product News  
1/20/2006   Post a comment
The latest version of Esterel Technologies' Studio tool suite includes key features to design multi-clock and power-optimized circuits and to generate SystemC.
Development methodology extended to discrete processors
Product News  
1/20/2006   Post a comment
EDA vendor Altium said the latest version of its Designer product development system supports a range of discrete 32-bit ARM technology-based processors.
Mentor execs recognized by IEEE
News & Analysis  
1/20/2006   Post a comment
Mentor Graphics' Dennis Brophy and Dave Rich have received the IEEE Working Group Chairman’s Award for their contributions to the IEEE SystemVerilog standard.
Xilinx falls short of Wall Street earnings expectations
News & Analysis  
1/19/2006   Post a comment
Programmable logic supplier Xilinx reported a net income of $81 million on revenue of $450 million for the company's third quarter of fiscal 2006. Xilinx topped Wall Street analyst revenue expectations, but fell short on bottom line income.
Partnering startups claim DFM sign-off tool
News & Analysis  
1/19/2006   Post a comment
Startups Nannor Technologies and Predictions Software say they have integrated their products to create a solution that can serve as a design-for-manufacturing signoff tool in much the same way as Synopsys' PrimeRail and competing tools provide signoff for timing.
Agilent to add 3-D electromagnetic simulation to portfolio
News & Analysis  
1/18/2006   Post a comment
Agilent Technologies plans to expand its EDA product portfolio to include full three-dimensional electromagnetic simulation with a new offering later this year.
Mentor providing design environment for RapidChip
Product News  
1/18/2006   Post a comment
Mentor Graphics joined the LSI RapidChip platform ASIC partner program and promised the companies' mutual customers the ability to shorten system-on-chip development cycles and focus on product differentiation.
Analyst ups Xilinx forecast again
News & Analysis  
1/18/2006   Post a comment
Saying the company continues to make market share gains versus rival Altera, American Technology Research has
Firms collaborating on SystemC design
News & Analysis  
1/18/2006   Post a comment
Summit Design and Actis Design announced a collaboration aimed at promoting SystemC coding styles that ensure increased productivity and high-quality, maintainable code.
Applied Wave Research claims 'radical' enhancements to tool suite
Product News  
1/18/2006   Post a comment
High-frequency EDA tool provider Applied Wave Research has released the 2006 version of its Visual System Simulator software suite, touted as a complete toolset for the design of end-to-end communications systems.
NEC Compound Semi, Ansoft offer device library
News & Analysis  
1/17/2006   Post a comment
EDA vendor Ansoft announced the release of a new device library based on NEC Compound Semiconductor Devices' high-performance transistor technologies.
Green Hills offering operating system for BAE Systems RAD750
News & Analysis  
1/17/2006   Post a comment
Device software optimization provider Green Hills Software announced the availability of a complete port of its Integrity real-time operating system to the BAE Systems' RAD750 radiation-hardened PowerPC Processor and CompactPCI single board computer.
ESL provider joins consortium promoting IP interoperability
News & Analysis  
1/17/2006   Post a comment
Electronic system level tool provider Bluespec has joined the Spirit Consortium, a global organization pushing to advance interoperability standards for intellectual property reuse in system-on-chip design.
Celoxica's Agility compiler supporting SystemC 2.1
News & Analysis  
1/17/2006   Post a comment
The latest release of Celoxica's Agility Compiler for SystemC synthesis supporting SystemC prototyping and verification can generate register-transfer level descriptions from transaction level models for popular ASIC/ system-on-chip synthesis flows and gate-level electronic design interchange ormat netlists for programmable logic devices.
Tool said to eliminate FPGA/pcb integration barriers
News & Analysis  
1/17/2006   Post a comment
Australian EDA supplier Altium Ltd. said that Altium Designer 6.0, the latest version of the company's unified electronic product development system, significantly strengthens support for FPGA-printed circuit board co-design.
DSP power management tools tout more battery life
Product News  
1/17/2006   Post a comment
Texas Instruments new Power Optimization DSP Starter Kit enables system developers to accurately plan, analyze, manage and optimize real-time power consumption for its TMS320C55x DSPs. The kit was jointly developed by TI, Spectrum Digital, Inc. and National Instruments.
Cadence to help Russian electronics industry
News & Analysis  
1/17/2006   Post a comment
The Moscow Institute of Electronic Technology (Miet) has chosen Cadence Design Systems as the sole provider of design technologies for helping Miet develop the Russian electronics industry and provide local startup companies better access to the global industry.
How to choose custom IC design tools
News & Analysis  
1/16/2006   Post a comment
Looking for custom design tools? Tanner's Massimo Sivilotti discusses return on investment (ROI), the cost of doing business, and the important features to consider when comparing offerings.
Synopsys slips back, other EDA stocks post gains
News & Analysis  
1/13/2006   Post a comment
After posting a 33-cent gain to close at a new 52-week high for a second consecutive day, shares of top-tier EDA vendor Synopsys declined 27 cents to close at $21.40.
Xilinx buys AccelChip, hints at future acquisitions
News & Analysis  
1/13/2006   Post a comment
Taking advantage of lagging sales at AccelChip, FPGA provider Xilinx has purchased the Matlab-to-RTL DSP synthesis firm for $21.5 million, according to two sources close to the deal.
Xilinx buys AccelChip, hints at future acquisitions
News & Analysis  
1/13/2006   Post a comment
Taking advantage of lagging sales at AccelChip, FPGA provider Xilinx has purchased the Matlab-to-RTL DSP synthesis firm for $21.5 million, according to two sources close to the deal.
PLM provider to help companies reuse information
News & Analysis  
1/13/2006   Post a comment
Product lifecycle management software provider MatrixOne Inc. plans to release a business process application, Library Central, designed to help companies accelerate product development and delivery through knowledge reuse.
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