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posted in October 2000
UMC makes available Chipsizer estimation tool on Web site
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10/30/2000   Post a comment
SUNNYVALE, Calif.--Taiwan's United Microelectronics Corp. today claimed to be the first IC maker to publicly offer an online chip-size and cost estimation tool for designers using its wafer-processing foundry services. The Chipsizer comes from nTool Inc. of Fremont, Calif., and can be accessed on UMC's Web site at www.umc.com.
Design automation segment shows unexpected strength in 2000
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10/26/2000   Post a comment
SAN JOSE -- Despite disappointing earnings reports from high-tech companies, the electronics design automation (EDA) industry appears to be having a banner year. New figures released by the EDA Consortium show a 14% year-to-year jump in worldwide revenues for the second quarter of 2000, and the first batch of third-quarter reports from public EDA companies shows unexpectedly strong growth.
LSI Logic's Q3 sales up 35%; bullish about Q4
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10/24/2000   Post a comment
MILPITAS, Calif. -- Citing strong demand for its communication chip products, LSI Logic Corp. here today beat the street by reporting sales of $728 million for its third quarter ended Sept. 30, a 35% jump over the $540 million posted in the like period a year ago. Net income before amortization of goodwill and other special items was $114 million, or $0.33 per diluted share, compared to $55 million, or $0.17 per diluted share, a year ago. Analysts estimated that the company would report earnin
Cadence boasts stellar Q3 results, major design-tool order by TI
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10/20/2000   Post a comment
SAN JOSE -- With revenues up 47% on a year-to-year basis, Cadence Design Systems Inc.'s third quarter results appear to show a solid recovery from the company's 1999 downturn. Cadence has also announced a large-scale EDA purchase agreement with Texas Instruments Inc. that could lead to the replacement of other vendors' EDA tools, said Dallas-based TI.
Synopsys teams with STMicro to increase design-for-test capabilities
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10/18/2000   Post a comment
MOUNTAIN VIEW, Calif.--Synopsys Inc. and STMicroelectronics in Europe today announced an alliance to develop and deploy advanced design-for-test software used on complex system-on-chip products. Under the partnership, STMicroelectronics will help Synopsys identify new design-for-test (DFT) requirements, which will be used to enhance existing solutions.
National adds 'virtual prototyping' to Web-based tools
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10/17/2000   Post a comment
SANTA CLARA, Calif. -- National Semiconductor Corp. this week is expanding its online engineering workbench to include a phase-locked loop (PLL) simulator, an enhanced power simulation tool, and a one-of-a-kind thermal analysis system for evaluating board designs with "virtual prototyping" capabilities. National said the enhanced Webench 2.0 system will not only speed development of products by chip customers, but it w
Mentor sues Aptix to recoup legal costs in Quickturn case
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10/10/2000   Post a comment
WILSONVILLE, Ore. -- The failed attempt by Mentor Graphics Corp. and Aptix Corp. to sue the Quickturn subsidiary of Cadence Design Systems Inc. has now turned into a three-way battle. Mentor has filed a new lawsuit charging Aptix with fraud and civil conspiracy.


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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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