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Content tagged with Design Tools (EDA)
posted in October 2008
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Analysis: Percello puts femtocell baseband on a chip
Design How-To  
10/31/2008   Post a comment
BDTI explains how Percello squeezed a UMTS cellular femtocell baseband onto a highly integrated SoC.
IEEE to vote on new low-power design standard
News & Analysis  
10/31/2008   Post a comment
IEEE P1801 has been completed, and the standard has gone to sponsor ballot. The standard is also known as Unified Power Format (UPF) 2.0.
Agilent introduces EMPRO 3D electromagnetic design platform
Product News  
10/31/2008   Post a comment
Agilent introduced Electromagnetic Professional (EMPro), a new design platform for analyzing the electromagnetic (EM) effects of RF and microwave components.
Gemini unveils spice-accurate analog simulation technology
Product News  
10/31/2008   Post a comment
Gemini unveiled a fast SPICE-accurate simulation technology specifically developed to leverage the throughput advantages of multi-core computing.
Debugging: The 9 Indispensible Rules for Finding Even the Most Elusive Software and Hardware Problems (Chapter 4, Part 1 of 3)
Design How-To  
10/31/2008   Post a comment
These excerpts from an excellent book will help you learn how to be effective at that elusive but critical engineering skill of hardware and software debugging
New DSP-FPGA development platform
Product News  
10/30/2008   Post a comment
Avnet, Xilinx, and Texas Instruments release the Avnet Spartan-3A DSP FPGA / DaVinci Development Platform.
Sneak preview: The future of wireless
Blog  
10/30/2008   2 comments
Here's a solution that might bring software-defined radio to a handheld consumer device near you.
Bozotti identifies four priorities at ST
Product News  
10/30/2008   Post a comment
Shortly after STMicroelectronics NV (Geneva, Switzerland) reported a third quarter net loss of $289 million, Carlo Bozotti, president and CEO of ST, highlighted four key priorities for the group.
Video: Lenny Lipton on 3DTV
Design How-To  
10/30/2008   1 comment
Stereo 3-D pioneer Lenny Lipton, the chief technology officer of RealD Cinema, discusses the technical and market challenges facing 3DTV in an interview at the Mann Chinese Theater in Hollywood.
Semantic search said to surpass Google
News & Analysis  
10/29/2008   Post a comment
Elsevier's illumin8 search engine uses a technology thesaurus to interpret the meaning of terms, and then summarizes results categorized in separate panes by organization, approach, benefit, author/inventor, company and product.
All-in-One Baseboard B-11 accelerates high-performance ASIC prototypes
Product News  
10/29/2008   Post a comment
Featuring Altera's Stratix III FPGAs, the Baseboard B-11 (Stratix III Edition) from Accverinos targets the custom logic used in video and imaging, communications, and industrial applications.
Gopher takes the grunt out of microcontroller picks
News & Analysis  
10/29/2008   Post a comment
GruntWare has developed a Web-based search tool that enables designers to select a proper microcontroller for embedded applications.
Video: Top Hollywood techie on digital shift
News & Analysis  
10/29/2008   Post a comment
Wendy Aylsworth, the vice president of engineering for the Society of Motion Picture and Television Engineers, discusses Hollywood's transition to digital networking, SMPTE's new structure and its broadband and 3DTV groups.
Preliminary DFI specification 2.1 now available
News & Analysis  
10/28/2008   Post a comment
The preliminary version of the DDR PHY Interface (DFI) specification 2.1, which defines an interface protocol between memory controller logic and PHY interfaces, has been made available on the DFI ecosystem community Web site.
Simulink Fixed Point gets major upgrade
Product News  
10/28/2008   Post a comment
Simulink Fixed Point 6 from The Mathworks supports word widths up to 128 bits and features an automated workflow to move from floating-point to fixed-point designs.
Mastering mixed-signal IC design
Product News  
10/28/2008   Post a comment
Analog designers, digital IC designers/verification engineers, place and route engineers and project managers in Cambridge and Bristol in the UK are invited to attend a free technical seminar presented by Cadence.
Opportunities in Analog Verification
Design How-To  
10/28/2008   10 comments
The wireless industry is continuously innovating and re-shaping the state-of-the-art techniques in analog and RF circuit design. Verification engineers have to be capable of thinking beyond a particular block and formulate their verification strategies in the context of the complete system.
Viewpoint: Mobile device security is a moving target
News & Analysis  
10/28/2008   Post a comment
Secure, segregated areas for critical code have to be combined with secure communications in order to provide protection for mobile devices.
OpenCores records 20,000 users
News & Analysis  
10/28/2008   1 comment
OpenCores.org, a community developed around open-source hardware intellectual property (IP) blocks, announced it has passed the mark of 20,000 registered users, reflecting a growing interest for open-source hardware IP cores.
Mentor rolls reference design for multimedia apps
Product News  
10/27/2008   Post a comment
Mentor Graphics announced the availability of a multimedia application reference design said to enable the rapid development of multimedia devices such as portable media players, personal navigation devices, mobile internet devices, mobile phones and others.
New decimal arithmetic IP library
Product News  
10/27/2008   1 comment
SilMinds has developed a complete library of IP Cores implementing decimal floating-point algebraic operations.
DAC introduces user track
News & Analysis  
10/27/2008   Post a comment
DAC is announcing a new technical initiative focused on highlighting challenges and benefits of EDA tools.
Multiple techniques solve stability problems in power op amps (Part 3 of 3 )
Design How-To  
10/27/2008   Post a comment
Understanding the basic guidelines for evaluating stability and employing a Bode plot--as well as knowledge of some proven techniques--will enable rendering a power op amp circuit unconditionally stable
Virtual prototypes speed wireless development
News & Analysis  
10/27/2008   Post a comment
More than one billion wireless devices are sold every year.
IPDs take charge in high-reliability applications
News & Analysis  
10/27/2008   Post a comment
One of the biggest challenges integrated passive device (IPD) manufacturers still face is trying to sell the IPD concept of looking at total installed cost, not just cost of the part, when compared with discrete solutions.
Cover low-power design with constant analysis
News & Analysis  
10/27/2008   Post a comment
One of the biggest challenges integrated passive device (IPD) manufacturers still face is trying to sell the IPD concept of looking at total installed cost, not just cost of the part, when compared with discrete solutions.
Process variation tool comes to Europe
News & Analysis  
10/24/2008   Post a comment
Solido Design Automation has signed an agreement with UK based Sipeda Ltd to act as its European representative. Solido develops EDA tools to compensate for process variations in analog/mixed-signal, custom digital and memory integrated circuits.
Updated: Cadence delays 3Q financial report
News & Analysis  
10/22/2008   1 comment
EDA vendor Cadence Design Systems said it would postpone the release of its eagerly anticipated third quarter financial results, pending review of the recognition of revenue related to customer contracts signed during the first quarter.
Arteris enhances its interconnect IP and toolset
Product News  
10/22/2008   Post a comment
Arteris has released its latest version of network-on-chip IP and related toolset.
Test company adjusts licensing for harder times
News & Analysis  
10/22/2008   Post a comment
XJTAG, a Cambridge, England-based global supplier of IEEE Std. 1149.x-compliant boundary scan development systems, is adjusting its corporate licensing plan to the economic hard times.
Programmable Logic DesignLine and Altium are holding a Design Competition
Programmable Logic DesignLine Blog  
10/21/2008   Post a comment
Do you want a free super-cool Innovation Station (a US$9000+ value including a perpetual software license)? If so, I'm the man you need to be talking to...
Sequence PowerTheater adds new timing-aware RTL power analysis
Product News  
10/21/2008   Post a comment
Sequence Design's PowerTheater has added new 'timing-aware' RTL power analysis features to address the twin challenges of shrinking process geometries and high-performance devices driving hundreds of clock domains.
Sequence adds timing-aware RTL power analysis to PowerTheater
Product News  
10/21/2008   Post a comment
Sequence Design said it has added "timing-aware" RTL power analysis features to its PowerTheater power analysis and prototyping tool.
EMA TimingDesigner and Altera's Quartus II Software
Product News  
10/21/2008   Post a comment
EMA TimingDesigner 9.1 adds SDC support and integration with Altera's Quartus II software.
Free ColdFire processor for Altera Cyclone III FPGAs
Product News  
10/21/2008   1 comment
The V1 ColdFire processor FPGA CIII is available now from the folks at IPextreme.
Programmable electrical rule checking
Design How-To  
10/21/2008   Post a comment
Circuit design implementation has become progressively complex in deep submicron technologies. With complex IP, system integration, and multiple power domains, greater flexibility and power to handle emerging circuit verification demands are needed in the EDA tools available today.
Gemini unveils analog simulation tool
News & Analysis  
10/21/2008   Post a comment
Gemini Design Automation, an EDA start-up that has spent the last three years under wraps, has just unveiled its simulation technology.
Calypto adds VHDL support to PowerPro CG
News & Analysis  
10/21/2008   Post a comment
Calypto Design Systems has added new sequential power optimizations and support for VHDL designs its PowerPro CG automated register transfer level power optimization solution, the company said.
Calypto Strengthens PowerPro CG
Product News  
10/20/2008   Post a comment
Calypto Design Systems Inc. has added new sequential power optimizations and support for VHDL designs to PowerPro CG (clock gating an automated register transfer level (RTL) power optimization solution.
MatLab enhances parallel programming tools
Product News  
10/20/2008   Post a comment
The MathWorks is rolling out a new release of its MatLab environment that includes new parallel programming capabilities that lets users distribute parallel MatLab applications as standalone executables or software components that can more easily take advantage of computing clusters and multicore processors.
Software-to-FPGA workstation accelerates applications by 80X over Core 2 Duo with under 100 Watts of power.
Product News  
10/20/2008   Post a comment
New development system from Pico Computing and Impulse Accelerated Technologies includes hardware platform, C-to-FPGA compiler, and reference applications.
IP supplier becomes fabless chip vendor
News & Analysis  
10/20/2008   Post a comment
Samplify Systems has changed its business model, moving from an intellectual property (IP) provider to a fabless semiconductor company with the announcement of its first silicon products.
Killer app for cell handsets
News & Analysis  
10/20/2008   Post a comment
To continue the Moore's law trend toward smaller, sleeker handheld devices, designers can leverage advanced packaging and interconnect methods to meet the miniaturization requirements.
Featured Product: Enhanced power-supply design tool adds graphs, analysis, and detailed thermal modeling
Design How-To  
10/20/2008   Post a comment
National Semiconductor's Webench adds new optimization tools, BOM charts, efficiency and footprint graphs, reports, and sophisticated thermal simulation
Multicore SoCs change interconnect requirements
Design How-To  
10/20/2008   Post a comment
The recent appearance of multicore system-on-chip devices has rearranged the boundaries among silicon devices, boards and subsystems.
Multicore partitioning is a threads and comms problem
Design How-To  
10/20/2008   Post a comment
As more processor architectures turn to multicore designs, embedded developers are left with significant software development challenges. Tool providers and industry organizations have been making incremental progress toward addressing those challenges with their latest step simplifying software partitioning among cores. Vendors warn, however, that software developers must learn how to think outside the linear execution box.
Cadence CTO blasts critics
News & Analysis  
10/17/2008   Post a comment
Responding to harsh criticism touched off by the departure of senior executives, the chief technology officer of Cadence Design Systems Inc. dismissed calls to reduce the EDA company's size.
Philips shows magic wands and electric dresses
News & Analysis  
10/16/2008   3 comments
A tour of Philips Research showed a host of projects ranging from novel remote controls and 3DTVs to wearable electronics and intelligent buildings, all in progress under a new corporate philosophy of open innovation.
Cadence: sartorial elegance falls short
Blog  
10/16/2008   2 comments
Corporate marketing and public relations are not enough to change a company.
Commentary: Cadence's CEO resigns, pain or relief?
News & Analysis  
10/15/2008   Post a comment
"Fister needs to do something to fix the company," a veteran EDA analyst recently stated. Michael Fister, President and CEO of Cadence Design Systems, Inc. since 2004, has made a radical decision: he has resigned.
Page 1 / 2   >   >>


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