Brazil: A high-tech hot spot for innovation and investment Blog 10/28/2010 13 comments Brazil has risen to become the world’s eighth-largest economy and is predicted to join the top five by 2030, outlines Claudionor Coelho of Jasper Design Automation. In addition to its well-known strengths in renewable energy, raw materials, agriculture, oil and the aviation industry, Brazil is fast becoming a major player in electronics.
Help needed with Microsoft Visio Blog 10/27/2010 8 comments To be honest this is a bit of a bummer, because if you had asked me only a week ago I would have claimed to be one of the world's experts in using this little rascal.
Electronically 'stoking' a Corvette Blog 10/25/2010 2 comments If you missed the QNX Corvette at Convergence 2010, you can still see its reconfigurable digital instrument cluster and versatile application platform HMI at the ARM Technology Conference in November.
Agatha Christie meets Dr. Who Blog 10/25/2010 5 comments A brief account of my recent travels to England where I smash my computer, see the reconstruction of Charles Babbage’s Difference Engine, discover a Dr. Who Police Box, and see an Agatha Christie play…
Atrenta, TSMC team on soft IP qualification flow News & Analysis 10/25/2010 Post a comment Atrenta Inc., a provider of early design closure solutions, and Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) announced they have joined forces to enhance the quality of delivered synthesizable IP using Atrenta's SpyGlass platform.
Cadence, Xilinx form FPGA IP ecosystem microsite News & Analysis 10/20/2010 Post a comment Cadence Design Systems Inc. and Xilinx Inc. announced they have launched a Xilinx IP Ecosystem microsite, as part of the ChipEstimate.com portal, to facilitate FPGA and ASIC designers' access to the latest IP supporting the Xilinx programmable platform.
Extreme DA rolls GoldTime 2010.09 Product News 10/20/2010 Post a comment Extreme DA has unveiled the 2010.09 release of its GoldTime Sign-off suite with 2X faster timing analysis, including signal integrity (SI) effects and enhanced features over its 2009 release.
Are design and test conflicting or symbiotic? Blog 10/20/2010 7 comments These days, IC design engineers have more functionality to implement in their designs than ever before, even though design schedules are shrinking. Although design-for-test (DFT) is absolutely necessary to enable thorough and cost-effective manufacturing test, it potentially makes the overall design process even more challenging.
Time to working prototype Blog 10/19/2010 2 comments With regard to an earlier blog *Emulate or Prototype?*, Brian takes his discussions a little further and explores some figures brought to his attention by Dave Orecchio, the CEO of GateRocket.
AMI models: What, why and how? Design How-To 10/18/2010 Post a comment IBIS AMI specifications are released by the IBIS committee. The specifications define the interface between EDA tools and an AMI model but the IBIS AMI model generation remains a challenge to many IC vendors. This paper discusses IBIS AMI generation flow by taking a simple example of a PCI Express transmitter.
Evaluation system uses IO-Link for Infineon MCUs Product News 10/14/2010 Post a comment Hitex Development Tools has worked with Infineon Technologies, TMG Technologie Management Gruppe Technologie und Engineering, ZMDI Zentrum Mikroelektronik Dresden and with development tool support from Keil to developed an IO-Link demonstration system
Become your customers Blog 10/14/2010 17 comments EDA companies design tools for two different publics, the circuit design public and the semiconductor industry public. This viewpoint outlines the dynamics of these two publics and explores the concept of public in detail. It also looks at interdisciplinary areas of psychology and human factors to understand how design is perceived.
Mentor offers UI maker for Android Product News 10/14/2010 5 comments EDA and embedded software vendor Mentor Graphics Corp. has announced the availability of user interface development kit for the Android operating system comprising graphics and user interface creation tool.
QuickLogic ArcticLink II CX CSSP family Product News 10/13/2010 1 comment QuickLogic's new ArcticLink II CX family of CSSPs are ideally suited to address the needs and challenges of the mobile market with regard to products such as smart phones and tablet computers..
Altera launches major embedded initiative News & Analysis 10/12/2010 7 comments As part of its embedded initiative, Altera will expand its current embedded partner programs by embracing the broad ecosystems from ARM, Intel, and MIPS Technologies, as well as the FPGA world.
EDA sales shifting east, EDAC report shows News & Analysis 10/12/2010 19 comments The Asia-Pacific region has overtaken Europe and Japan as a consumer of electronic design automation (EDA) software and services and has benefited the most from sales in the second quarter of 2010.
USB-IF certification for Evatronix' SuperSpeed USB 3.0 device IP core News & Analysis 10/12/2010 1 comment The silicon intellectual property (IP) provider, Evatronix SA, announces that its high performance SuperSpeed USB 3.0 device controller IP core has been officially certified by USB-Implementers Forum, the organization behind the USB standards, as fully compatible with the latest version of the SuperSpeed USB 3.0 specification.
Tanner EDA joins Si2 coalition News & Analysis 10/12/2010 Post a comment Tanner EDA (Monrovia, Calif.) announced it has joined the Silicon Integration Initiative (Si2), an organization focused on the development and adoption of standards to improve IC design.
Mosys uses Altos' Liberate for high speed I/O characterization News & Analysis 10/11/2010 Post a comment Mosys Inc. (Santa Clara, Calif.) announced it has licensed Liberate, Altos Design Automation's ultra-fast cell characterization solution, to re-characterize foundry-based standard cell libraries for characterization of its internally designed high speed interface (I/O) cells.
ST's Carmelo Papa appointed chairman of EPoSS News & Analysis 10/11/2010 Post a comment Carmelo Papa, executive vice president and general manager of the industrial and multisegment business within STMicroelectronics, has been appointed chairman of a European think-tank for smart system integration.
A bit of a laugh... Blog 10/8/2010 3 comments I have all sorts of things I should be doing, but I just ran across something that made me laugh, and that led to something else ... you know how it goes. So I thought you might enjoy a bit of a laugh also.
Have you done anything interesting with CPLDs? Blog 10/8/2010 4 comments In this week's newsletter I asked: "Have you done anything interesting with CPLDs or FPGAs or any other type of programmable device recently? If so, please drop me a line and tell me about it." Well Ken Whiteleather, who is now with Sparton Defense and Security Systems, responded as follows...
As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.
January 2016 Cartoon Caption ContestBob's punishment for missing his deadline was to be tied to his chair tantalizingly close to a disconnected cable, with one hand superglued to his desk and another to his chin, while the pages from his wall calendar were slowly torn away.122 comments