Taiwan confronts SoC obstacles News & Analysis 11/20/2001 Post a comment IC design houses in Taiwan expect difficulties in quickly designing cost-effective system-on-chip products based on reusable intellectual property cores will be a key challenge as the island tries to become a provider of higher value products and services.
Altera, Synopsys plan 'ASIC-like' design solutions for complex PLDs News & Analysis 11/14/2001 Post a comment SAN JOSE -- Altera Corp. and Synopsys Inc. today announced plans to jointly develop ASIC-like design solutions for complex system-on-programmable-chip (SoPC) devices. The partnership will address the need for next-generation design and verification flows for high-density programmable logic devices, said the two companies.
Japanese tout simplified transistor design methodology News & Analysis 11/8/2001 Post a comment The University of Hiroshima has teamed with Japan's Semiconductor Technology Academic Research Center (Starc) to unveil a transistor design methodology for both CMOS and analog-based circuits that they hope will replace the troubled BSIM4 method.
ITC 2001 Emphasizes More Cooperation, Less Test Cost News & Analysis 11/8/2001 2 comments Activities and products at the recent International Test Conference focused on making manufacturing test faster and less expensive. Jim Lipman, TechOnLine's Content Director, discusses ITC's major themes along with some of the show's more interesting product announcements.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.