COT: post design considerations News & Analysis 11/25/2002 Post a comment The proliferation of libraries and intellectual property (IP) in the customer-owned tooling (COT) world has lowered the barrier of entry for those interested in moving to a COT design flow.
Packaging Choices for Wireless IC Designs Design How-To 11/22/2002 Post a comment High-frequency chips pose difficult problems for designers looking for cost-effective, non-performance-limiting packages for these chips. Agilent's Chris Mueth discusses the different types of packages that are available, the required characteristics of these packages, and the need to integrate package and chip analysis into a common design flow.
Streamlining the SoC Design Flow Design How-To 11/20/2002 Post a comment New process technologies are fueling ever-shrinking chips of rapidly increasing density and complexity. At the same time, SoC times-to-market are also shrinking. Mentor Graphics' Claudia Relyea describes the challenges facing SoC design teams along with some ideas for streamlining the chip-design flow.
PCB Design-Tool Progress Continues Slowly Design How-To 11/6/2002 Post a comment Compared to chip design-tool development, advancements in the PCB
design-tool arena are not very dynamic. TechOnLine's Jim Lipman
discusses why he thinks PCB tool development is so slow and what PCB
tool vendors need to do to address upcoming system-design problems.
A Book For All Reasons Bernard Cole1 Comment Robert Oshana's recent book "Software Engineering for Embedded Systems (Newnes/Elsevier)," written and edited with Mark Kraeling, is a 'book for all reasons.' At almost 1,200 pages, it ...