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Content tagged with Design Tools (EDA)
posted in November 2004
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Si2 OpenAccess links IC logical design to physical design
News & Analysis  
11/3/2004   Post a comment
The Silicon Integration Initiative's (Si2) OpenAccess Coalition hopes that the 2.2 release of OpenAccess will open the floodgates for adoption of the tool interoperability standard.
Synopsys buys assets of mixed signal IP vendor LEDA Design
News & Analysis  
11/2/2004   Post a comment
Continuing its acquisition streak, Synopsys Inc. announced Tuesday (Nov.2) that it has acquired certain assets of mixed-signal intellectual property company LEDA Design for an undisclosed amount.
PCB-Tool unterstützt virtuelle Designteams
News & Analysis  
11/2/2004   Post a comment
Die Bildung "virtueller" Designteams ermöglicht ein neues Tool von Mentor Graphics: Damit können mehrere Entwickler gleichzeitig an einem Leiterplatten-Layout arbeiten, unabhängig von ihrem geographischen Aufenthaltsort.
Une jeune pousse de CAO lève 7 millions de dollars dans un 3ème tour de financement
Product News  
11/2/2004   Post a comment
Zenasis technologies Inc., société américaine de CAO électronique (Conception assistée par ordinateur), a bouclé un troisième tour de financement de 7 millions de dollars auprès de Newbury Ventures et d’investisseurs existants, à savoir Sigma Partners, Selby Venture Partners et VentureTech Alliance.
MatrixOne upgrades Synchronicity suite
News & Analysis  
11/1/2004   Post a comment
Product lifecycle management company MatrixOne Inc. has released the first revision of Synchronity technology since it acquired Synchronicity in June 2004.
Zenasis gets $7 million in series C funding
News & Analysis  
11/1/2004   Post a comment
EDA IC design optimization startup Zenasis Technologies Inc. has raised $7 million in its third round of funding from Newbury Ventures along with existing investors Sigma Partners, Selby Venture Partners and VentureTech Alliance.
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michigan0 Sang Kim First, 28nm bulk is in volume manufacturing for several years by the major semiconductor companies but not 28nm FDSOI today yet. Why not? Simply because unlike 28nm bulk the LDD(Lightly Doped Drain) to minimize hot carrier generation can't be implemented in 28nm FDSOI. Furthermore, hot carrier reliability becomes worse with scaling, That is the major reason why 28nm FDSOI is not manufacturable today and will not be. Second, how can you suppress the leakage currents from such ultra short 7nm due to the short channel effects? How thin SOI thickness is required to prevent punch-through of un-dopped 7nm FDSOI? Possibly less than 4nm. Depositing such an ultra thin film less then 4nm filum uniformly and reliably over 12" wafers at the manufacturing line is extremely difficult or not even manufacturable. If not manufacturable, the 7nm FDSOI debate is over!Third, what happens when hot carriers are generated near the drain at normal operation of 7nm FDSOI? Electrons go to the positively biased drain with no harm but where the holes to go? The holes can't go to the substrate because of the thin BOX layer. Some holes may become trapped at the BOX layer causing Vt shift. However, the vast majority of holes drift through the the un-dopped SOI channel toward the N+Source,...
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