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Content tagged with Design Tools (EDA)
posted in November 2009
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Tanner EDA, SoftMEMS support A/MS, MEMS design in India
Product News  
11/12/2009   Post a comment
Tanner EDA, a division of Tanner Research Inc. (Monrovia, Calif.), and SoftMEMS LLC (Los Gatos, Calif.) have sealed an agreement with Trident Techlabs Pvt. Ltd. to provide customers in Bangalore, Chennai, Delhi, Hyderabad and Pune with solutions for analog/mixed-signal and MEMS designs.
Two Synfora moves to foster high-level synthesis tools
News & Analysis  
11/12/2009   Post a comment
Seeking to further promote its PICO high level synthesis platform, Synfora Inc. announced it has appointed EDA expert Andrew Haines as vice president marketing and signed a distribution agreement with Israel-based Satris Group.
AMD sketches out two new x86 cores
News & Analysis  
11/12/2009   Post a comment
AMD sketched rough outlines of two new x86 cores—including a rival to Intel's Atom--the company plans to put in products for 2011 and said it has working versions of its first 32nm Fusion chips that integrate x86 and graphics cores and will sample them before June.
Some cool stuff from ICCAD
Programmable Logic DesignLine Blog  
11/11/2009   Post a comment
There were several interesting FPGA-related papers presented at the 2009 International Conference on Computer-Aided Design last week in San Jose.
China selects Infineon chips for passports
News & Analysis  
11/11/2009   Post a comment
Infineon Technologies AG (Munich, Germany) has started delivering SLE 66CLX800PE security microcontrollers for use in Chinese passports.
Xilinx releases IBIS-AMI models for its transceivers
Product News  
11/11/2009   Post a comment
Xilinx this week announced the availability of what it called the industry's first IBIS-AMI models for FPGA transceivers, saying they will enable designers to reduce simulation time from hours to minutes.
Lattice FPGA design suite adds support for DDR interfaces
Product News  
11/11/2009   Post a comment
Lattice Semiconductor announced Version 8.0 of its ispLEVER FPGA design tool suite, which the company said includes enhancements for the design of high-speed double-data-rate interfaces for the LatticeECP3 FPGA family.
Lattice Semiconductor and Beyond Semiconductor to collaborate on compilers
News & Analysis  
11/10/2009   Post a comment
Lattice Semiconductor Corporation will collaborate with Beyond Semiconductor in the development of compiler tools for Lattice's soft processors. The collaboration will include updates and performance improvements for its embedded processor IP compilers and development tools.
Artisan continues industry consolidation with Extessy merger
Product News  
11/10/2009   Post a comment
With its acquisition of Extessy, Artisan Software Tools adds system requirements, co-simulation, integration and test tools to its product portfolio while extending its professional services capability in Germany.
Lattice recruits Slovenian firm to develop compilers
News & Analysis  
11/10/2009   Post a comment
Programmable logic vendor Lattice Semiconductor Corp. (Hillsboro, Or.) has said it will collaborate with Beyond Semiconductor (Ljubljana, Slovenia) on the development of compiler tools for Lattice's soft processors.
Taiwan hosts first SystemC users group forum
News & Analysis  
11/10/2009   Post a comment
The Open SystemC Initiative announced the newly-launched Taiwan SystemC Users Group is hosting its first forum on Nov. 16 in Hsinchu.
Boundary scan and JTAG emulation combine for advanced structural test and diagnostics
Design How-To  
11/10/2009   Post a comment
While continuously improving IC and SOC technologies, higher clock rates, and more powerful processors are music to the design engineers’ ears, the headaches of test engineers are getting worse and worse.
Arteris rolls out packages to address IC complexity
Product News  
11/9/2009   Post a comment
Arteris Inc. (San Jose, Calif.), a supplier of networking-on-chip intellectual property, has introduced two on-chip interconnect products to address interconnect issues facing IC designers, including the design of ICs with lower power, higher performance and lower silicon area.
WEBENCH Visualizer gives DC/DC power-supply designers real-time interactive tool for dynamic assessment, tradeoffs, optimization across various parameters and criteria
Product News  
11/9/2009   Post a comment
Latest enhancement to long-established tool from National Semiconductor lets users compare, balance performance, size, cost, and BOM for ICs and passive components
Book Excerpt--Microwave and RF Design: A Systems Approach (Part 4 of 8)
Design How-To  
11/9/2009   Post a comment
Enhance your understanding of transmission lines and microstrip structures, in theory and practice
SystemC synthesis subset draft standard released
News & Analysis  
11/9/2009   1 comment
The Open SystemC Initiative (OSCI) has moved one step further. It has released a draft of SystemC synthesis subset standard, which is open for public review until Jan. 21, 2010.
The best of both worlds: Optimizing OCP slave memory behavior
Design How-To  
11/9/2009   Post a comment
This paper discusses how DesignWare VIP for OCP helps you test the spread of best-case, worst-case memory response.
Synopsys mulls spinoff for design kit initiative
News & Analysis  
11/9/2009   Post a comment
Seeking to gain more support for its process design kit (PDK) initiative, Synopsys Inc. demonstrated its PDK technology and disclosed the idea of possibly spinning out the effort.
Dolphin Integration readies dynamically self-configured cache controller
Product News  
11/6/2009   Post a comment
EDA and IP company Dolphin Integration SA (Meylan, France) has introduced I-Stratus-LP cache controller that is said to be dynamically self-configured to minimize power consumption.
Arrow Electronics uses Synopsys' ATPG tool
News & Analysis  
11/6/2009   Post a comment
Seeking to shorten its test development schedules, Arrow Electronics Inc. said it has adopted Synopsys' TetraMAX automatic test pattern generation (ATPG) tool.
Nanomaterials lab licenses Infiniscale's behavioral modeling tool
News & Analysis  
11/5/2009   Post a comment
CEA-Liten, France-based Laboratory for Innovation in New Energy Technologies and Nanomaterials, has licensed TechModeler behavioral modeling tool suite from Infiniscale SA for its organic electronic devices modeling needs.
Realtek expands licensing agreement with Synopsys
News & Analysis  
11/5/2009   Post a comment
Synopsys, Inc. and Realtek Semiconductor Corp. have gone one step further in their business relations.
Top ten Chinese chip design houses ranked
News & Analysis  
11/5/2009   4 comments
The Chinese IC design sector was worth 23.52 billion yuan (about $3.44 billion) in 2008, and threw up some changes in the top ten ranking, according a report by Market Intelligence & Consulting Institute.
Graphics processing: When DIY just doesn't make sense
Design How-To  
11/5/2009   Post a comment
High-end displays are gaining ground, and designers are urged to develop more advanced graphics processing. To lower the cost of ownership, ARM suggests licensing of an integrated GPU solution that includes software and hardware.
Collaboration paves the way for launch of a coupled Li-ion simulation tool
Product News  
11/4/2009   Post a comment
Battery Design LLC, a world leading provider of battery modeling software, is collaborating with CD-adapco, a provider of engineering simulation tools for fluid dynamics and heat transfer, to deliver a coupled Li-ion simulation tool in early 2010.
EE Times' Top 10 women in microelectronics
Survey  
11/4/2009   Post a comment
EE Times has compiled an international list that celebrates women who are business and technology leaders in microelectronics.
Mentor Graphics reveals new strategy to unify silicon test and yield analysis
News & Analysis  
11/4/2009   Post a comment
Mentor Graphics Corporation has outlined its new strategy to help customers address the growing test challenges they face in moving to smaller process nodes and more complex, low-power, mixed-signal systems-on-chip (SOCs).
EDA pundits envision more 'ASIC-like tools' for FPGAs
Programmable Logic DesignLine Blog  
11/4/2009   1 comment
A pair of EDA pundits outlined some ways EDA would evolve, including getting more revenue from FPGA users.
Dolphin Integration opens competency center in Israel
Product News  
11/3/2009   Post a comment
EDA and IP company Dolphin Integration SA (Meylan, France) has created Dolphin Integration Ltd. in Netania, Israel, in a view to foster the company's product developments in advanced memories, analog and mixed-signal circuits.
CSR in hiring push seeks R&D engineers, finance execs
News & Analysis  
11/3/2009   Post a comment
CSR plc, a fabless chip supplier for applications ranging from Bluetooth to GPS communications, is making a major hiring push according to open positions listed at its website.
Radisys, 6Wind, Aricent ready integrated ATCA platform for LTE market
News & Analysis  
11/3/2009   Post a comment
Radisys Corp. has teamed with Aricent and 6Wind SA to deliver application-ready ATCA platforms for the Long Term Evolution (LTE) Evolved Packet Core.
Update: Apache job post points to an EDA IPO
News & Analysis  
11/3/2009   Post a comment
Apache Design Solutions Inc. (San Jose, Calif.), a vendor of power and noise analysis EDA software, has posted a job opening on its website which indicates the company is considering an initial public offering of shares in the company.
Update: Apache job post points to an EDA IPO
News & Analysis  
11/3/2009   Post a comment
Apache Design Solutions Inc. (San Jose, Calif.), a vendor of power and noise analysis EDA software, has posted a job opening on its website which indicates the company is considering an initial public offering of shares in the company.
Researchers detail new power management technique
News & Analysis  
11/2/2009   2 comments
University researchers have proposed a new power management technique that they say significantly reduces system-level energy consumption without negatively impacting the reliability of the system.
Analyst raises chip market forecast on September strength
News & Analysis  
11/2/2009   Post a comment
Bruce Diesen, analyst with Carnegie ASA (Oslo, Norway) has raised his forecast for the 2009 chip market. The market will still be down but the market shrink will be less than Carnegie previously predicted.
DAC survey uncovers surprises
Blog  
11/2/2009   Post a comment
At this year's DAC in San Francisco, EVE SA (Palaiseau, France) conducted a survey to determine preferences and prevalence of verification environments. In this guest blog, Lauro Rizzatti, general manager of EVE USA, presents the survey findings, bearing strong promises for hardware-assisted verification vendors.
Acquisition yields combo test/yield product line
News & Analysis  
11/2/2009   Post a comment
Mentor Graphics has combined its embedded compression and Automatic Test Pattern Generation (ATPG) technology with Built-In Self-Test (BIST) technology from recently-acquired LogicVision into the new Tessent product line.
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