Bugs Be Gone!
Design How-To 11/29/2012 Post a comment
Smarter debug and synthesis techniques will help you isolate errors and get your FPGA design to work on the board.
You too can be a "Layaway Santa"
Programmable Logic DesignLine Blog 11/28/2012 Post a comment
I think this is a jolly good idea, and that any of us with a few extra dollars in our pockets should think seriously about spreading a little cheer.
Thinking about Gift Cards? Think again!
Programmable Logic DesignLine Blog 11/28/2012 3 comments
I'm not sure if all of these issues are true in every case, but I will absolutely be reading the fine print before shelling out any more of my hard-earned cash.
Blog 11/28/2012 Post a comment
This is a consolidated listing of all of the blogs written by Mentor Graphics, that have appeared in the EDA Designline.
Design Reuse without Verification Reuse Is Useless
Design How-To 11/26/2012 Post a comment
Total productivity is defined by many things. Design productivity has been boosted by reuse but verification productivity has not been boosted in the same way. This article looks at a way in which verification can be reused in a way which boosts overall productivity…
Synopsys rolls out upgrade to HAPS
Blog 11/20/2012 1 comment
HAPS is going back to its roots with a more modular architecture and takes advantage of some new features in the Virtex 7 architecture giving more capacity and performance…
Taser for kids
Engineering Pop Culture! 11/20/2012 14 comments
Specially engineered for children. Has a lower voltage output and smaller barbed spikes than the popular adult model compliance tool.
Fighting fires with fuses
The Engineering Life - Around the Web 11/20/2012 3 comments
Capdevielle’s day to day job consists of being on the front lines of circuit safety, answering scores of queries on a daily basis from engineers about product design, and where fuses fit in.
Speeding power estimation from weeks to hours
Design How-To 11/19/2012 2 comments
This paper describes a new methodology that automatically generates a chip design’s gate-level waveform from the RTL design environment without the need to bring up the gate-level environment...
Circuit protection; shock tactics in real time
Engineering Investigations 11/12/2012 2 comments
When you’re dealing with something as volatile as electricity, it’s always better to be safe than sorry. At least, that’s what fuse maker Littelfuse believes, and the reason why the firm is putting its not so little weight behind an initiative that promises to deliver rapid responses, in real time, to engineers working on designs requiring circuit protection.
Man-from Mars Radio Hat
Engineering Pop Culture! 11/12/2012 17 comments
Back in the 1950s, the Radio Hat was a portable radio built into a pith helmet that would bring in stations within a 20 mile (32 km) radius.
These made me chuckle...
Programmable Logic DesignLine Blog 11/7/2012 19 comments
I was reading the 12/12 issue of Reader's Digest yesterday evening, and I spotted a couple of gems I wanted to share...