7 warning signs that you should be concerned about your IP provider
Design How-To 12/19/2002 Post a comment
Reusing semiconductor intellectual property (SIP or IP) blocks is no longer a luxury for the designers of complex chips it is a necessity. As mask costs skyrocket and qualified engineering resources become increasingly scarce, chip design teams are incorporating IP reuse strategies into virtually every chip development plan in order to minimize design cycles, reduce chip respins, and meet time-to-revenue goals.
IP strategies proliferate as SoC complexity grows
News & Analysis 12/19/2002 Post a comment
Merging previously designed circuit blocks into new system-on-chip designs seems like a sound way of controlling the complexity of SoC projects and leveraging the relatively scarce resources of the circuit design community at least on the surface. But reuse of intellectual property (IP) is shaping up as a complex design approach with its own unique characteristics.
Taking the Frustration Out of Embedded Design
News & Analysis 12/11/2002 Post a comment
Effective hardware/software co-design tools remain elusive for most embedded-system designers. Xilinx's Rich Sevcik discusses why he thinks emerging FPGA design platforms offer a viable alternative to ASIC-based embedded design.