Design Con 2015
Breaking News
Content tagged with Design Tools (EDA)
posted in December 2004
Cool EDA offerings for the new year
News & Analysis  
12/30/2004   Post a comment
FPGA programming, easy formal verification, a video processing tool, Matlab-to-RTL, and FPGA-based emulation — these are some of the recent developments that can help designers in 2005.
Top ten EEdesign stories of 2004
News & Analysis  
12/30/2004   Post a comment
From the legal troubles of ex-Aptix CEO Amr Mohsen, to Cadence Design Systems' new CEO and Synopsys' acquisition of Monterey Design Systems, here are the top ten EEdesign news stories of 2004, ranked according to reader response.
Aldec blends SystemC, HDL debugging
News & Analysis  
12/28/2004   Post a comment
Expanding its capabilities for mixed-language simulation of ASICs and FPGAs, Aldec Corp. this week (Dec. 27) announced the release of Riviera 2004.12. New features include integrated SystemC and HDL debugging, assertion-based verification, and functional code coverage.
An introduction to PLM for EDA
Design How-To  
12/28/2004   Post a comment
A chip development project may involve over 100,000 design files, says MatrixOne's Brad Hafer (right). He shows how product lifecycle management (PLM) can cut through the confusion, and describes how PLM can be tailored for EDA environments.
Sun, Cadence partner with Indian firm for VLSI training
News & Analysis  
12/28/2004   Post a comment
Sun Microsytems and Cadence Design have partnered with Veda Institute of Information Technology, based in Hyderabad in southern India, to start the country's first nodal center of competency for research and development in VLSI engineering, design automation and embedded system engineering
EDA-Umsätze sanken im dritten Quartal
News & Analysis  
12/28/2004   Post a comment
Vor wenigen Tagen veröffentlichte das EDA Consortium seine statistische Untersuchung, "Market Statistics Survey" MSS).
Synopsys shift caused EDA decline, analysts say
News & Analysis  
12/23/2004   Post a comment
A move by Synopsys towards subscription licenses was the primary reason for the EDA industry's revenue decline in the third quarter of 2004, according to two analysts. Meanwhile, the analysts said, the combined market share held by the "big three" EDA vendors is declining.
Wenn schlechte Gehäuse gute Platinen stören
News & Analysis  
12/23/2004   Post a comment
Horrorgeschichten gibt es ganz in Ihrer Nähe: Sobald IC- oder FPGA-Gehäuse auf den vorgesehenen Platinen eingesetzt sind, funktioniert nichts mehr - mit oft fatalen Folgen.
JTAG targets production test
Product News  
12/22/2004   Post a comment
Working with JTAG? Here's a new software add-on that gives you a graphical way to run JTAG tests in production-line settings. Use it to test boards with JTAG-compatible devices on-board, such as BGAs, chip-scale packages, flip-chips, and other high-density packages.
EDA revenues decline in third quarter
News & Analysis  
12/22/2004   Post a comment
A falloff in North American revenues resulted in a 3 percent decline in EDA license and maintenance revenue in the third quarter of 2004, according to the EDA Consortium's Market Statistics Survey (MSS). "The recovery is yet to come," said Wally Rhines, EDA Consortium chairman.
Mentor adds tools for flex PCBs
Product News  
12/21/2004   Post a comment
Noting the increasing use of flex PCBs in applications requiring small form factors, Mentor Graphics Corp. has incorporated flex and rigid-flex PCB design capabilities into its Expedition and Board Station layout tools.
Philips, Spirit exec joins VSI Alliance's board
News & Analysis  
12/20/2004   Post a comment
The Virtual Socket Interface Alliance, the intellectual property standards body, has continued its restructuring by recruiting to its board a Philips Semiconductor's standards guru and Spirit consortium Chairman Ralph Von Vignau.
Embedded Algorithms for Co and Parallel Processing
Product News  
12/17/2004   Post a comment
C language based hardware compiler can automate the generation of algorithms into embedded hardware and make your own re-usable IP.
Embedded Systems ASIC Designers Can Now Use Anti-Fuse Technology in Their Designs
Product News  
12/17/2004   Post a comment
Embedded Designers Can Now Add Field Programmable Logic Arrays and OTP Memory To Their ASIC Designs
Mixed-level modeling allows IC virtual prototypes
News & Analysis  
12/16/2004   Post a comment
Electronic system level (ESL) design is necessary for complex SoCs, but how can you make it happen? Authors including Synopsys' Markus Wloka (right) present a dynamic mixed-level modeling methodology that lets you build virtual prototypes with functional models and detailed timed models.
RF tool vendor Eagleware buys ESL tool vendor Elanix
News & Analysis  
12/16/2004   Post a comment
Privately held RF and microwave PCB design tool firm Eagleware Corp. (Norcross, GA) has signed a definitive agreement to purchase the assets of electronic-system level (ESL) design tool provider Elanix Inc. (Westlake Village, Calif.) for an undisclosed sum.
Nassda granted hybrid dynamic/static circuit simulation patent
News & Analysis  
12/16/2004   Post a comment
Nassda Corp. has been issued a patent by the United States Patent and Trademark Office for a method describing a hybrid system of static analysis and dynamic simulation for IC design verification.
RubiCAD folds after refusing to pursue patent fight
News & Analysis  
12/15/2004   Post a comment
One of the EDA industry's oldest companies, RubiCAD Corp., has closed its doors rather than pay a licensing fee or contest a broad patent case over layout migration.
Synopsys and Agilent intro scan diagnostics
Product News  
12/15/2004   Post a comment
Test-and-measurement giant Agilent Technologies and EDA/signal integrity powerhouse Synopsys announce an industry-first scan diagnostics reference methodology. According to the two firms, the new methodology will speed semiconductor fault localization and failure analysis by implementing bi-directional information sharing.
DFM market will bloom in 2005, speakers predict
News & Analysis  
12/15/2004   Post a comment
Starting in 2005, IC design for manufacturability (DFM) will live up to the hype and become the next big growth opportunity for EDA, said speakers at a DFM Symposium hosted by financial firm Adams Harkness.
Labat leaves CEO position at TeraSystems
News & Analysis  
12/15/2004   Post a comment
EDA provider TeraSystems Inc. is looking for a new CEO following the departure of Alain Labat from that position, EE Times has learned. TeraSystems provides silicon virtual prototyping tools for RTL handoff.
On-chip trace and debug approach targets Atmel FPGAs
Product News  
12/14/2004   Post a comment
The domain of on-chip testability and debug continues to get better. Hardware verification and debug supplier First Silicon Solutions is teaming up with chip maker Atmel to jointly produce a product for on-chip debug, trace, and logic analysis of Atmel's popular FPSLIC and FPGA products.
Des experts se penchent sur l’avenir de la vérification IP
News & Analysis  
12/14/2004   Post a comment
Lors de la conférence IP-SOC, du 8 au 9 décembre 2004 à Grenoble, un public composé d’ingénieurs de conception et de cadres dirigeants du secteur de la CAO électronique a pu assister à un panel de discussions consacré à la vérification IP.
Flomerics upgrades thermal/electrical PCB tool
News & Analysis  
12/13/2004   Post a comment
Thermal and EMC tool specialist Flomerics Inc. has released a new version of its FLO/PCB electronic and thermal PCB design collaboration software.
Altium adds support for latest Quartus II release to Nexar
Product News  
12/13/2004   Post a comment
Nexar allows the interactive development of complete systems, including processor-based designs, on an FPGA platform.
HARDI releases 4-million gate ASIC prototyping board
News & Analysis  
12/13/2004   Post a comment
ASIC prototyping company HARDI Electronics has released a new ASIC prototyping motherboard with multigigabit serial links, embedded PowerPC processors and over 1,600 pairs of LVDS signals.
Atmel FPGA designers can now use Precision RTL Synthesis from Mentor Graphics
Product News  
12/13/2004   Post a comment
Atmel Extends and Expands Partnership with Mentor Graphics, OEM Agreement Spans Synthesis, Simulation, and Verification
Lattice and Mentor Expand Partnership Agreement
Product News  
12/13/2004   Post a comment
Partnership Adds Precision RTL Synthesis To Lattice Design Tools Portfolio, Includes Upgraded ModelSim RTL And Timing Simulator Capabilities And Performance-
New Lattice ispLEVER 4.2 Adds New Features
Product News  
12/13/2004   Post a comment
Increased Performance, Dozens Of New Features, Using Fewer Computing Resources -
Un responsable de ST plein d’éloges pour la modélisation au niveau transactionnel
News & Analysis  
12/10/2004   Post a comment
Philippe Magarshack, vice-président de la recherche et développement chez STMicroelectronics, a parcouru les 20 km qui séparent Crolles de Grenoble pour faire un discours à l’occasion de la conférence IP-SOC 2004.
CAN MCUs housed in 28-pin, 6x6 mm QFN Packages
Product News  
12/10/2004   Post a comment
Microchip Technology Inc. has joined the growing number of vendors now offering new microcontrollers chips with CAN functionality.
It's time to eliminate wire load models
News & Analysis  
12/10/2004   Post a comment
A new generation of interconnect modeling, combined with global optimization, is long overdue, says Cadence Design Systems' Chi-Ping Hsu.
How statistical sensitivity makes designs manufacturable
News & Analysis  
12/10/2004   Post a comment
RF, microwave and high-speed digital circuits have inherent sensitivities to component and parasitic values. Consultant John Purviance (right) shows you how to "center" designs using statistical sensitivity before going into manufacturing.
Startup optimiert IC-Layouts für höhere Ausbeute
News & Analysis  
12/8/2004   Post a comment
Selbst die besten Chiplayouts können etwas Nachhilfe vertragen, um eine bessere Ausbeute zu erzielen - das behauptet jedenfalls der Startup Nannor Technologies, der derzeit an einem Layout-Optimierungstool arbeitet.
Former 0-In CEO to head Summit Design
News & Analysis  
12/7/2004   Post a comment
Preparing for a possible initial public offer (IPO), electronic system level (ESL) provider Summit Design Inc. has named EDA veteran Emil Girczyc as its new president and CEO. Girczyc was president and CEO of 0-In Design Automation prior to its acquisition by Mentor Graphics Corp. last June.
ZigBee demonstration and development platform supports multiple RF transceivers
Product News  
12/6/2004   Post a comment
Microchip Technology Inc.'s new PICDEM Z 2.4 GHz Demonstration Kit provides an easy-to-use evaluation and development platform for ZigBee application designers.
Low-cost Spice program adds features
News & Analysis  
12/6/2004   Post a comment
new version of B2 Spice A/D from Beige Bag Software adds a redesigned user interface, new virtual instruments, and cross-probing between schematics and simulation. But what may be most attractive to many prospective users is the price, which starts at $249.
TI's MSP430 MCUs get Eclipse-based development tools
Product News  
12/6/2004   Post a comment
Texas Instruments' new Code Composer Essentials (CCEssentials) for its MSP430 family of microcontrollers allows designers and third parties to easily integrate updates and plug-ins to provide a highly customized and flexible IDE.
EDA-Software: Warten auf neue Tools bremst den Markt
Product News  
12/6/2004   Post a comment
Die Industrie für Halbleiter-Designtools wird in diesem und im folgenden Jahr mit gebremsten Wachstum rechnen müssen. Grund ist der Mangel an Produkten für die nächsten Chipgenerationen.
Steps towards a better EDA industry
News & Analysis  
12/4/2004   Post a comment
An EDA veteran who's left for other callings, Paul Lippe, looks back on his former industry and identifies what's wrong — and what it will take to turn things around.
Dataquest issues 2004 EDA market report
News & Analysis  
12/4/2004   Post a comment
The lack of new 65nm and 45nm tools will slow EDA revenue growth in 2004 and 2005, says research firm Gartner Dataquest in its new market trends report. The report also says the ESL market took a major hit, and that Synopsys lost market share in IC implementation and formal verification, but gained in signal integrity.
Collaboration seen as key to DFM, but experts say time is past for just talk
News & Analysis  
12/3/2004   Post a comment
The virtual reintegration of the design chain -- the close collaboration between customers, EDA vendors, mask makers and foundries -- will be key to making the most of sub 130nm silicon processes, said panelists here Thursday (Dec. 3rd) at a Cadence sponsored industry forum.
Synopsys atteint ses prévisions trimestrielles et annuelles
News & Analysis  
12/3/2004   Post a comment
Synopsys Inc. atteint ses objectifs après l’annonce, le 1er décembre, d’un rachat d’actions et de l’acquisition de son rival, Nassda Corp.
The why, where and what of low-power SoC design
Design How-To  
12/3/2004   Post a comment
Minimizing power consumption is a huge challenge for nanometer systems-on-chip. In this tutorial article, Cadence Design Systems' Pete Bennett (right) shows why that's the case, and details techniques that can help, including multiple voltage domains, clock phasing, and clock gating.
Synopsys décide de mettre un terme à ses litiges en acquérant Nassda
News & Analysis  
12/2/2004   Post a comment
Afin de mettre fin à des démêlés judiciaires de longue date, Synopsys Inc. est sur le point d’acquérir son rival dans le domaine de la CAO, Nassda Corp., pour 192 millions de dollars en espèces, a annoncé Synopsys le 1er décembre 2004.
SystemC drängt auf IEEE-Standardisierung
Product News  
12/2/2004   Post a comment
Die Hardware-Beschreibungssprache SystemC hat den wichtigen Schritt vom einstigen Adhoc-Standard zum offiziellen IEEE-Entwurf geschafft. Anhänger von SystemC hoffen nun, dass sich die Sprache mit der künftigen IEEE-Absegnung bei EDA-Anbietern und Anwendern stärker durchsetzen wird.
L’ancien vice-président du marketing de Cadence à la tête de l’éditeur de logiciels Mercury
News & Analysis  
12/2/2004   Post a comment
L’ancien vice-président du marketing de Cadence, Tony Zingale, vient d’être nommé président et directeur d’exploitation de Mercury Interactive, société sur Internet spécialisée dans les logiciels de tests.
Synopsys hits quarterly, annual guidance, 'steals' Nassda
News & Analysis  
12/1/2004   Post a comment
Synopsys Inc. hit expectations after announcing a stock buyback and the acquisition of legal rival Nassda Corp.
Former Cadence VP Zingale heads software firm Mercury
News & Analysis  
12/1/2004   Post a comment
Former Cadence marketing vice president Tony Zingale has been appointed the president and chief operating officer of web site testing software company Mercury Interactive.


Top Comments of the Week
Flash Poll
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Want a Voltera Desktop PCB Printer?
Max Maxfield
7 comments
I just received an email from my chum Javi in Spain. "Have you heard about Voltera (VolteraInc.com)? It's a Canadian company that is going to offer desktop-size PCB printers for fast ...

Martin Rowe

No 2014 Punkin Chunkin, What Will You Do?
Martin Rowe
2 comments
American Thanksgiving is next week, and while some people watch (American) football all day, the real competition on TV has become Punkin Chunkin. But there will be no Punkin Chunkin on TV ...

Rich Quinnell

Making the Grade in Industrial Design
Rich Quinnell
15 comments
As every developer knows, there are the paper specifications for a product design, and then there are the real requirements. The paper specs are dry, bland, and rigidly numeric, making ...

Martin Rowe

Book Review: Controlling Radiated Emissions by Design
Martin Rowe
1 Comment
Controlling Radiated Emissions by Design, Third Edition, by Michel Mardiguian. Contributions by Donald L. Sweeney and Roger Swanberg. List price: $89.99 (e-book), $119 (hardcover).

Special Video Section
The LT8640 is a 42V, 5A synchronous step-down regulator ...
The LTC2000 high-speed DAC has low noise and excellent ...
How do you protect the load and ensure output continues to ...
General-purpose DACs have applications in instrumentation, ...
Linear Technology demonstrates its latest measurement ...
10:29
Demos from Maxim Integrated at Electronica 2014 show ...
Bosch CEO Stefan Finkbeiner shows off latest combo and ...
STMicroelectronics demoed this simple gesture control ...
Keysight shows you what signals lurk in real-time at 510MHz ...
TE Connectivity's clear-plastic, full-size model car shows ...
Why culture makes Linear Tech a winner.
Recently formed Architects of Modern Power consortium ...
Specially modified Corvette C7 Stingray responds to ex Indy ...
Avago’s ACPL-K30T is the first solid-state driver qualified ...
NXP launches its line of multi-gate, multifunction, ...
Doug Bailey, VP of marketing at Power Integrations, gives a ...
See how to ease software bring-up with DesignWare IP ...
DesignWare IP Prototyping Kits enable fast software ...
This video explores the LT3086, a new member of our LDO+ ...
In today’s modern electronic systems, the need for power ...