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posted in December 2006
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Last minute deals open opportunities for 2007 and beyond
Blog  
12/31/2006   Post a comment
In the week between Christmas and New Year, a semiconductor equipment company purchased an EDA company, and an EDA company increased its ESL expertise with the acquisition of a British company. And both events have given pundits cause for judgments, predictions, and the usual doomsday scenario. I thought the combined news exciting and full of promise.
Centralized storage caching fixes the EDA compute bottleneck
Design How-To  
12/31/2006   Post a comment
EDA environments, with their demanding data intensive applications, often experience the pain of I/O bottlenecks. Scalable caching appliances deliver high capacity, high performance cache as a shared network service to accelerate data center performance. They connect to the network via standard Gigabit Ethernet, complementing existing storage to provide very high throughput and real time data access.
Analyst Gary Smith: top 10 EDA topics for 2007
News & Analysis  
12/28/2006   Post a comment
Veteran EDA analyst Gary Smith explains his "top ten" list of hot EDA topics for 2007, including electronic system level (ESL), design for manufacturability (DFM), IP reuse, analog/RF, globalization, and multi-core systems on chip.
CoCreate's new PLM tool suite 'changes the rules'
Product News  
12/28/2006   Post a comment
Innovation is the lifeblood of companies in the fast-moving electronics industry, yet the very process of product development can become a roadblock to beating a competitor to market. CoCreate Software Inc., a product lifecycle management software provider, is trying to eliminate those design bottlenecks using an approach to 3D product development the company calls "dynamic modeling."
Formal provider OneSpin opens U.S. office
News & Analysis  
12/28/2006   Post a comment
OneSpin Solutions, a formal verification spinoff from Infineon in Germany, has opened a U.S. office in Sunnyvale, Calif. to boost sales of its Module Verifier and Equivalence Checker products.
Mentor confirms ESL buy with SpiraTech
News & Analysis  
12/27/2006   Post a comment
Mentor Graphics has confirmed its acquisition of SpiraTech, an electronic system level (ESL) tool provider whose tools are based on a proprietary assertion-based language.
Heard on the Beat: Has Mentor bought SpiraTech?
News & Analysis  
12/26/2006   Post a comment
Has Mentor Graphics Corp. bought SpiraTech Ltd.? The word on the street, or rather the mobile phone, is that Mentor has bought the company.
Forte's new CEO pushes behavioral synthesis adoption
News & Analysis  
12/21/2006   Post a comment
Sean Dart, Forte Design Systems' new president and CEO, will try to expand the adoption of Forte's Cynthesizer behavioral synthesis tool beyond its current stronghold in the Japanese consumer electronics marketplace.
Three letters acronyms: ESL, RTL, DFM and Verification as well
Blog  
12/21/2006   Post a comment
Important news and product announcements make the last few days before the holidays interesting in the EDA industry.
ESL pioneer Forte closes $5.4M funding
News & Analysis  
12/20/2006   Post a comment
Aiming to expand its worldwide presence in behavioral synthesis, electronic system level (ESL) design provider Forte Design Systems has closed a series D round of venture funding for $5.4 million.
Cadence claims RTL synthesis boost
Product News  
12/19/2006   Post a comment
A substantial R&D effort has boosted quality of silicon and slashed run times for Cadence Design Systems' RTL Compiler synthesis tool, said Pradeep Fernandes, vice president for synthesis R&D at Cadence.
Reuse is key to reducing design costs, MIT prof says
News & Analysis  
12/19/2006   Post a comment
The only way to lower design costs will be in dramatically increasing IP reuse, according to an MIT professor.
DVCon 2007 sets technical program
News & Analysis  
12/18/2006   Post a comment
The Design and Verification Conference (DVCon), set for Feb. 21-23, 2007 in San Jose, Calif., has announced a three-day technical program including tutorials, a keynote address, panel discussions, and paper presentations.
Practical Applications of Statistical Static Timing Analysis
Design How-To  
12/18/2006   Post a comment
Statistical Static Timing Analysis (SSTA) becomes a necessity as a paradigm shift in timing analysis must be considered while the electronic design industry continues to push the limits of Moore's Law. The major reason for this is overly pessimistic timing analysis, which threatens to negate many of the benefits that smaller process geometries offer, when traditional static timing analysi is used.
Lyrtech unveils new SignalMaster Quad Virtex-4 and DRC Virtex-4
Product News  
12/15/2006   Post a comment
The SignalMaster Quad Virtex-4 cPCI development board uses a unique combination of FPGAs and DSPs to help develop and test DSP algorithms in real-time environments.
Q&A: Denali's Srivastava bridges EDA, IP domains
News & Analysis  
12/15/2006   Post a comment
Sanjay Srivastava, Denali Software co-founder and CEO, discusses his company's involvement in EDA, intellectual property (IP), embedded software, and register design in this Q&A interview.
Holistic methodology boosts automotive semiconductor reliability
Design How-To  
12/14/2006   Post a comment
The semiconductor industry bears a particular responsibility in auto electronics quality and reliability. OEM demands of "new" quality levels are requiring supplier practices to realize zero-defect quality, from design to manufacturing.
Accellera seeks verification coverage standard
News & Analysis  
12/14/2006   Post a comment
The Accellera standards organization has launched a new effort to come up with a verification coverage standard that can help users determine when functional verification efforts are complete.
Rhines: India, China spawn new design methodologies
News & Analysis  
12/14/2006   1 comment
India and China are likely sources of new design methodologies in the future, and EDA providers must pay attention, said Wally Rhines, Mentor Graphics chairman and CEO, in a talk in Bangalore, India.
PSL Verification Package for the Open Core Protocol
Design How-To  
12/14/2006   Post a comment
A PSL Verification Package for the Open Core Protocol provides a flexible, powerful, and automatic verification method that complements the existing verification methodologies. The package improves both quality and efficiency of the functional verification by providing automation, simplifying debugging, and increasing visibility.
Matlab RF toolbox adds signal integrity
Product News  
12/13/2006   Post a comment
New time-domain capabilities in The Mathwork's RF Toolbox 2, a Matlab add-on, support signal integrity analysis of broadband backplanes and pc-board traces.
Virtual prototyping tool supports Windows CE
Product News  
12/12/2006   Post a comment
Embedded software developers using Microsoft's Windows CE operating system can now use the Virtual Platform product from CoWare Inc. for early software development, according to CoWare.
Wipro selects Cadence as primary tool provider
News & Analysis  
12/12/2006   Post a comment
Cadence Design Systems is claiming a significant marketing success in India by tying its technology into the in-house design methodology devised by the world's largest independent R&D services provider, Wipro Technologies.
India's Cosmic Circuits licenses IP
Product News  
12/12/2006   Post a comment
India's Cosmic Circuits has licensed silicon IP ready for volume production to 15 customers.
Startup weaves 'fabric' for IC design
News & Analysis  
12/12/2006   Post a comment
Startup Fabbrix Inc., which is announcing a collaboration with PDF Solutions this week, aims to reshape IC design through the use of regular design patterns or "fabrics," says Larry Pileggi, CTO.
An outlook of EDA in 2007
News & Analysis  
12/11/2006   Post a comment
EDA vendors face a new challenge for 2007: support designers that target the latest process and require highly sophisticated tools and methods while also providing reliable and cheaper tools for those customers using less advanced techniques.
CoWare integrates Microsoft Windows embedded CE on virtual platforms
Product News  
12/11/2006   Post a comment
CoWare, Inc.'s CoWare Virtual Platform product family is now interoperable with the Windows Embedded CE operating system.
Free tool offers MOSFET thermal simulation
Product News  
12/11/2006   Post a comment
A free on-line tool that employs finite element analysis lets designers run thermal simulations on Vishay Siliconix MOSFETs.
Blaze DFM allows 'smart' dummy fill
Product News  
12/11/2006   Post a comment
Startup Blaze DFM is rolling out a new "synthesis" tool that inserts dummy fill patterns into an IC design layout, guided by timing and power analysis.
NEC's MCUs enhance memory, pin counts
Product News  
12/11/2006   Post a comment
NEC Electronics America, Inc. has added sixteen new devices to its line of 16- and 32-bit all-flash microcontrollers. These MCUs offer up to twice the memory and a significant increase in pin-count options compared to previous devices in the line.
Overcoming high-volume IC design challenges to maximise profits
Design How-To  
12/11/2006   Post a comment
The handcrafted blocks in high-volume ICs dictate the overall floorplan and limit the remainder to irregular topologies, while the layout of this circuitry forms the focus for key performance, area and design-rule improvements. A shape-based physical design platform offers the ability to design the entire net as a whole, taking into consideration design rules, timing, performance and area. Furthermore, the shape-based approach routes all of it at once, delivering results that are as good " if n
May you live an interesting week
Blog  
12/9/2006   Post a comment
The week of December 4, 2006 was an interesting week in EDA. From product announcements that improve ESL utility to news about offshoring, to indications of the future of the DFM market and more.
FPGA-to-ASIC integration provides flexibility in automotive microcontrollers
Design How-To  
12/9/2006   Post a comment
The primary benefit of using MCUs has been high level system integration combined with relatively low cost. However, there are hidden costs associated with these devices well beyond the unit price.
In-circuit programmer supports Atmel AVR MCUs
Product News  
12/8/2006   Post a comment
RPM Systems Corp. has launched its MPQ-AVR, a four-port, in-circuit programmer for Atmel AVR microcontrollers. The system features on-board flash storage of program images, and offers stand-alone, PC-controlled or ATE-controller programming modes.
Wind River unveils 2007 product roadmap
News & Analysis  
12/8/2006   Post a comment
Wind River Systems Inc. has outlined its product release roadmap scheduled for the fall 2007 and a future product release in spring 2008.
PCB expert joins Mentor Graphics
News & Analysis  
12/7/2006   Post a comment
Happy Holden, a well-known speaker, writer and researcher in pc-board design, has joined Mentor Graphics Corporation's systems design division.
Industry PCB Expert Joins Mentor Graphics
News & Analysis  
12/7/2006   Post a comment
Happy Holden, a respected speaker on PCB topics and industry expert, has joined Mentor Graphics' System Division as a senior technologist.
Globalization in an Analog/Mixed-Signal World
Design How-To  
12/7/2006   Post a comment
Today's companies must embrace the fact that the engineering world has changed. Demands for new and nimble engineering teams and work environments will continue. . Having a structure and protocol that enables international teams to work towards a common goal is something to establish—and, once in place, something to celebrate.
True Circuits rolls out 65 nm analog IP
News & Analysis  
12/6/2006   Post a comment
Moving to a new process node, True Circuits Inc. has announced "silicon proven" phase-locked loop (PLL) and delay-locked loop (DLL) hard macros using TSMC's 65 nm process.
Cavium Networks & Entropic Communications offer reference designs for digital media over coax
Product News  
12/6/2006   Post a comment
Cavium Networks and Entropic Communications have jointly launched two reference design platforms for products and systems targeting the distribution of digital entertainment to and inside the home. The reference designs are based on Cavium Networks' OCTEON and NITROX Soho processors and Entropic's c.LINK-270 chipsets.
Synplicity provides optimal support for Xilinx Spartan-3A FPGAs
Product News  
12/5/2006   Post a comment
Synplify Pro software offers design tool advantages for new low-cost, high-volume FPGA devices.
Mentor announces synthesis support for Xilinx Spartan-3A FPGAs
Product News  
12/5/2006   Post a comment
Precision Synthesis allows designers to cross-probe between multiple views as well as perform interactive static timing for rapid "what-if" analyses.
GreenSocs announces interoperability program for the ESL community
News & Analysis  
12/5/2006   Post a comment
APIs and infrastructure will enable the ESL community to quickly develop models and tools that can be used together with independence of vendor.
SystemC transaction-level draft standard released
News & Analysis  
12/5/2006   Post a comment
Boosting prospects for interoperable SystemC transaction-level models, the Open SystemC Initiative has released a draft TLM 2.0 standard "kit" for public review.
$8000 software is free to Agilent and Yokogawa realtime oscilloscope users
Product News  
12/4/2006   Post a comment
Focusing on clock and timing engineering and related measurement science, Amherst Systems Associates announces a North American kickoff of a program that will aggressively give away premium oscilloscope analysis and productivity software. The company's M1 Oscilloscope Tools will go to targeted users of Agilent and Yokogawa realtime oscilloscopes.
PTO to reexamine Magma patent
News & Analysis  
12/4/2006   Post a comment
The U.S. Patent and Trademark Office will reexamine one of two Magma Design Automation patents at issue in a high-profile lawsuit between Magma and Synopsys.
eSilicon's Harding lone addition to FSA board
News & Analysis  
12/4/2006   Post a comment
The Fabless Semiconductor Association announced its 2007 board of directors, including the addition of Jack Harding, chairman, president and CEO of eSilicon.
"Enterprise" System Level (ESL) Verification " PART II
Design How-To  
12/4/2006   Post a comment
In the second of a two parts article, Ran Avinun discusses the need to address System Level Design at the Enterprise level recognizing the role that software and firmware play in modern SoC designs. The article suggests that EDA companies must develop support for software certification within ESL tools.
Synthesis software takes Matlab to C
Product News  
12/4/2006   Post a comment
Catalytic is offering Catalytic MCS, a product that offers Matlab-to-C synthesis for Matlab algorithm developers.
Layout tool speeds MEMS design
Product News  
12/1/2006   Post a comment
GenISys has started sampling to designers of MEMS based devices, sensors and flat panel displays a flexible simulation platform for mask aligner lithography that lets them virtually model, redesign and optimize device layouts and processes in hours rather than weeks.
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Max Maxfield

MSGEQ7-Based DIY Audio Spectrum Analyzer: Testing
Max Maxfield
13 comments
In my previous column on this topic, we discussed the step-by-step construction of the first pass at a MSGEQ7-based DIY audio spectrum analyzer for use in my BADASS Display project. Of ...

Karen Field

June 2014 Cartoon Caption Winner
Karen Field
13 comments
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Jeremy Cook

Inspection Rejection: Why More Is Less in a Vision System
Jeremy Cook
3 comments
Albert Einstein has been quoted as saying, "Everything should be as simple as possible, but not simpler." I would never claim to have his level of insight -- or such an awesome head of ...

Jeremy Cook

Machine Fixes That Made Me Go 'DUH!'
Jeremy Cook
21 comments
As you can see in my bio at the end of this article, I work as a manufacturing engineer. One of my favorite things that happens on a Friday late in the afternoon is to hear my phone ring ...

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