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posted in December 2008
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Virage Logic cuts quarterly guidance
News & Analysis  
12/30/2008   Post a comment
Citing the increasing effect of the global financial crisis, IP vendor Virage Logic lowered revenue and earnings guidance for the company's fiscal first quarter, which ends Dec. 31.
Best of '08: DesignLines, TechOnline
Design How-To  
12/29/2008   Post a comment
Here are the 2008 top-rated and "editor's pick" feature articles from the TechOnline DesignLine sites and TechOnline webinars.
Measuring the stability of EDA vendors
Blog  
12/29/2008   1 comment
The amount of revenue generated per employee is a measure of the efficiency of a company and an indicator of its viability in a difficult market.
Startup rolls mask pattern qualification tool
News & Analysis  
12/24/2008   Post a comment
A consulting startup called Reticle Labs unveiled its first software product for mask pattern quantification to be used in the back-end mask manufacturing environment.
Analog Circuits: World Class Design (Chapter 4, Part 3 of 3)
Design How-To  
12/24/2008   5 comments
Increase your understanding and insight into analog systems, circuits, and components with two chapters from this recent book, presented in serial excerpt form.
Bot builder not 'Lost in Space' in moon mission
Product News  
12/23/2008   Post a comment
A former Air Force pilot's passion for space exploration has led him from a cottage business building sci-fi models to a real-life robotic mission to the moon as part of the $30 million Google Lunar X Prize.
Simon Bloch: EDA tools energize FPGAs
Blog  
12/23/2008   Post a comment
Simon Bloch posts a further contribution to the dialogue about EDA tools for FPGAs.
Top Design Articles for 2008
Design How-To  
12/23/2008   Post a comment
Most popular design articles for 2008.
XMOS to demonstrate complete suite of audio reference designs at NAMM 2009
Product News  
12/22/2008   Post a comment
Source code for the applications will be made available in January 2009 for royalty-free use in XMOS programmable chips.
Planet Analog: Top 20 Articles of 2008--(Part 2 of 2)
Design How-To  
12/20/2008   Post a comment
See which articles received the most page views from our audience in 2008
Debugging isn't what it used to be--and what you can do about it
Design How-To  
12/20/2008   Post a comment
Today's design architectures work against stage-by-stage, signal-flow debugging, but there are still some things you can put into your design to give you some debug traction. . . .
Bill Schweber, Planet Analog Editor
Report calls for restructuring patent office
News & Analysis  
12/19/2008   Post a comment
The U.S. Patent and Trademark Office needs to be overhauled if it is to come to grips with rising backlogs and a perception of declining patent quality, according to a report the U.S. Chamber of Commerce sent to President-elect Barack Obama.
Synopsys finalizes the CHIPit acquisition
Product News  
12/19/2008   Post a comment
Synopsys, Inc. announced it has completed its acquisition of the CHIPit business unit of ProDesign.
IP cores support Mentor's Precision Synthesis FPGA tool
Product News  
12/19/2008   Post a comment
IP cores from IPextreme are now validated for Mentor's Precision logic and physical synthesis flow.
Update: Alliance wants foundry for lithium ion cells
News & Analysis  
12/19/2008   Post a comment
An alliance of 15 companies will seek $1 billion in U.S. funding to create what amounts to a foundry for lithium ion battery cells.
ST, Synopsys partner to deliver complete design flow for 32-nm
News & Analysis  
12/18/2008   Post a comment
Synopsys, Inc. (Mountain View, Calif.) and STMicroelectronics NV (Geneva, Switzerland) have joined efforts to enable the readiness of key components in a 32-nm design flow, including ST's standard cell library for low power and high-performance design, and the support of the latest route rules in Synopsys' IC Compiler Zroute technology.
Viewpoint: Low-power design brings chip, software together
Design How-To  
12/18/2008   Post a comment
It's high time we made system design more power efficient, writes Steve Carlson of Cadence Design Systems.
Analysis: Did Cadence hit rock bottom?
News & Analysis  
12/17/2008   Post a comment
EDA vendor Cadence Design System hasn't had much to cheer about lately. But the company's stock enjoyed a relative surge after an analyst upgrade, prompting the question of whether the company hit rock bottom and is in rebound mode.
Video: NASA wants you in space
Product News  
12/17/2008   Post a comment
Four companies and a team from MIT Space Systems Laboratory announced their intention to compete for the Google Lunar X Prize, one of many efforts NASA hopes to inspire as part of its drive to promote more commercial exploration and use of space, often using off-the-shelf technologies.
Process variability still vexing designers
News & Analysis  
12/17/2008   Post a comment
CMOS device process variability remains one of the most acute problems facing the semiconductor industry, particularly at the 45-nm node and beyond, according to presenters at the International Electron Devices Meeting.
Analog Circuits: World Class Design (Chapter 4, Part 2 of 3)
Design How-To  
12/17/2008   Post a comment
Increase your understanding and insight into analog systems, circuits, and components with two chapters from this recent book, presented in serial excerpt form.
Planning, adopting and implementing adaptive reuse
Design How-To  
12/16/2008   Post a comment
Reuse of IP in a different context, which would turn one perfectly functioning chip into an inoperable one, has caused many to be cautious when it comes to whole-heartedly embracing reuse. Streamlining, breaking the problem into manageable pieces and reducing degrees of interaction complexities are benefits ofreuse intent and practice.
Mentor quadruples Veloce hardware emulation capacity
Product News  
12/16/2008   Post a comment
At up to 512 million gates, the Veloce Maximus product was designed to offer the required capacity for effective functional verification.
EDA Tools for FPGAs
Blog  
12/16/2008   Post a comment
EDA tools supporting development of FPGA based products need to support low power designs, but are quite sufficient for most designs.
Tela Innovations closes additional round of financing
Product News  
12/15/2008   Post a comment
Tela Innovations has closed an additional round of financing totaling $5.5 million.
Lattice releases ispLEVER 7.2 FPGA design tool suite
Product News  
12/15/2008   Post a comment
Latest ispLEVER software from Lattice Semiconductor includes advanced place-and-route algorithms for more efficient FPGA design.
Cadence adds parallel solving capabilities to Spectre
News & Analysis  
12/15/2008   Post a comment
Cadence Design Systems has released its latest circuit simulator, Virtuoso Accelerated Parallel Simulator (APS), part of the Multi-Mode Simulation (MM-SIM) 7.1 toolsuite.
AMD moves to 45-nm process node with Shanghai
News & Analysis  
12/15/2008   Post a comment
AMD moves to the 45-nm technology node with the launch of its new Opteron server chip, code-named Shanghai.
Design challenges ahead for media gateway
Design How-To  
12/15/2008   Post a comment
Media gateway developers, manufacturers and service providers are searching for cost-effective ways to meet market demand within reasonable time periods.
Planet Analog: Top 20 Articles of 2008--(Part 1 of 2)
Design How-To  
12/13/2008   Post a comment
See what our audience gave the most page views to, in 2008
Letter to the editor: Cadence needs to look at FPGA
News & Analysis  
12/11/2008   Post a comment
Cadence is doing many right things; however there is an important piece of the semiconductor business that they have failed to engage-in. They sit on the PCB; have strong position on the ASIC side leaving a huge gap in-between.
Tanner EDA announces support for Linux
Product News  
12/11/2008   Post a comment
Tanner EDA celebrates 20 years in business and expands its offerings to the Linux platform.
New AES encryption IP cores for FPGA designs
Product News  
12/11/2008   Post a comment
CAST is offering a special deal on a new line of high-performance AES encrypt / decrypt cores for use in FPGA and ASIC designs.
Cadence rolls parallel circuit simulator
Product News  
12/11/2008   Post a comment
Cadence Design Systems announced the availability of Virtuoso Accelerated Parallel Simulator, the company's next-generation circuit simulator.
Mephisto reinforces team with analog design expert
News & Analysis  
12/11/2008   Post a comment
Belgian analog and mixed-signal design tool vendor, Mephisto Design Automation NV, has recruited Pieter Palmers to take charge of it's application engineering and customer support functions.
Green Hills' promise: Code runs faster, or your money back
News & Analysis  
12/11/2008   Post a comment
Green Hills Software has formed a new division, Software Acceleration, that will optimize a product's software to achieve up to a 12x performance improvement--or you get your money-back.
Cadence Q3 revenue falls 42%
News & Analysis  
12/10/2008   Post a comment
Embattled EDA vendor Cadence Design Systems reported third quarter revenue of $232 million, a decrease of 42 percent from the same period of 2007. The company also announced it would revise its first and second quarter results downward by a total of nearly $38 million as the result of a previously announced investigation into improper revenue recognition.
EDA tools for FPGAs running out of gas
News & Analysis  
12/10/2008   1 comment
The field-programmable gate array (FPGA) market has experienced lackluster and flat growth in recent times. But now, the sector faces a set of new challenges that could threaten the business.
Freescale HCS08 microprocessor IP core for FPGA and ASIC designs
Product News  
12/10/2008   Post a comment
Synthesizable Freescale HCS08 microprocessor IP core for FPGA and ASIC designs available through IPextreme's online Core Store for $10,000 licensing fee.
Verayo secures FPGAs with silicon signatures
Product News  
12/10/2008   Post a comment
New technology from Verayo exploits the uniqueness of FPGA silicon to provide *silicon biometrics* for authentication and security applications.
How to exploit the uniqueness of FPGA silicon for security applications
Design How-To  
12/10/2008   Post a comment
By exploiting the silicon uniqueness of each FPGA device and extracting these "silicon biometrics", FPGAs can be used for new security-oriented applications not previously possible.
Analog Circuits: World Class Design (Chapter 4, Part 1 of 3)
Design How-To  
12/10/2008   3 comments
Increase your understanding and insight into analog systems, circuits, and components with two chapters from this recent book, presented in serial excerpt form.
Altium introduces live links to supplier databases
News & Analysis  
12/9/2008   Post a comment
New live links to component databases in Altium Designer give designers insight into component availability and pricing.
Real-time 3D PCB/FPGA design gets faster
Product News  
12/9/2008   Post a comment
New release of Altium Designer boasts 40 new features and 230 enhancements.
Security alert: Beware of USB memory sticks
News & Analysis  
12/9/2008   1 comment
The next time you find a USB memory stick in a parking lot or outside your house, think twice before plugging it in: It could cost you your intellectual property or personal identity. That was the startling alert put out by Adriel Desautels, chief technology officer at anti-hacking specialist firm NetraGard. And it's only the start.
EDA Rescue Plan
Programmable Logic DesignLine Blog  
12/9/2008   Post a comment
I just received an email from a company called Blue Pearl Software that, if nothing else, managed to grab my attention.
Synopsys is good for EDA
Blog  
12/9/2008   Post a comment
The news that Synopsys posted a profit for its fiscal fourth quarter is good news for the industry.
New small form-factor CPLDs ideal for high-volume handheld devices
Product News  
12/9/2008   Post a comment
ispMACH 4000ZE CPLDs from Lattice boast 36% smaller footprint and target high-volume, ultra-low-power handheld designs.
Software tools extend support for Actel's new nano FPGAs
Product News  
12/9/2008   Post a comment
In addition to supporting Actel's new nano FPGAs, Libero IDE 8.5 also offers high-speed multiplier instantiation for RTAX-DSP applications.
Algorithmic synthesis for video post-processor design
Design How-To  
12/9/2008   Post a comment
This article describes how ST Microelectronics used Algorithmic Synthesis to design a video post-processor, with the goals of improving project time and design flexibility, without compromising performance and power targets.
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