IBM qualifies Mentor's 45-nm tools News & Analysis 2/26/2008 Post a comment IBM Corp. has qualified Mentor Graphics' Calibre nmOPC and OPCverify computational lithography tools, which are accelerated with IBM's Cell processor technology, for production at 45 nm and smaller process nodes.
Synopsys Introduces the Eclypse Low Power Solution Product News 2/25/2008 Post a comment Synopsys has introduced a new design flow that supports Low Power solutions implemented in CMOS. The Eclypse solution supports the industry-standard Unified Power Format (UPF) language, which is used to capture low power design requirements.
Rhines to EDA: End 'endless verification' News & Analysis 2/22/2008 Post a comment Walden Rhines of Mentor Graphics used DVCon to call for a combination of formal methods, transaction level modeling techniques and intelligent testbenches to lower the cost of design verification.
DVCon Conference Sets Records Blog 2/22/2008 Post a comment Steve Bailey, General Chair of this year's DVCon conference, announced that both attendance and exhibition square footage have surpassed last year's figures and set a new record for the event.
IBM shows interest in Indian prototype fab News & Analysis 2/19/2008 Post a comment IBM Corp. has shown interest in setting up a prototype fab in the eastern Indian city of Kolkata designed to help fabless chip companies test designs before committing to expensive foundry production.
Accelerating MATLAB using MEX-files Design How-To 2/19/2008 Post a comment This article gives a quick overview of the different techniques available for speeding up MATLAB code. It covers the basics of performance profiling, vectorization, and turning MATLAB code into compiled MEX-files.
A resource you can trust Blog 2/16/2008 Post a comment EDA DesignLine, with the collaboration of Gary Smith, has launched a reference tool that you can find at the top of the Product Center section of the portal.
Xilinx Virtex-5 User-Guide Lite Design How-To 2/13/2008 5 comments As opposed to wading through more than 1,000 pages of Virtex-5 User-Guide documentation, this "User Guide Lite " boils all the key details down into a few easily-digestible pages.
Viewpoint: How to manage a billion cycles Design How-To 2/12/2008 Post a comment After years discussing verification strategies with hundreds of ASIC designers, it finally occurred to the author: We're at the point where designers are trying to manage billions of cycles of simulation.
Web TV Blog 2/12/2008 Post a comment Web TV is a new medium that is receiving lots of attention. Is it really an improvement over the written word?
Simplifying PLL Design Design How-To 2/12/2008 1 comment Phase lock loops (PLLs) play a key role in today's thriving RF industry. While they seem simple enough in structure and function, PLLs present some unique design challenges.
ST rolls out STM32 motor control starter kit Product News 2/11/2008 Post a comment Based on its STM32 microcontroller, STMicroelectronics announced a three-phase motor-control development kit that provides all the necessary hardware and firmware to enable users to evaluate the 32-bit device, and to begin development of their own sensorless motor-control application.
Altium Expands Its Products Line Product News 2/6/2008 Post a comment Altium is elevating the abstraction level of board design with the introduction of a new design environment and the extension of its NanoBoards family of products.
Replay available now: A handful of emerging network technologies are competing to be the preferred wide-area connection for the Internet of Things. All claim lower costs and power use than cellular but none have wide deployment yet. Listen in as proponents of leading contenders make their case to be the metro or national IoT network of the future. Rick Merritt, EE Times Silicon Valley Bureau Chief, moderators this discussion. Join in and ask his guests questions.