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posted in February 2009
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Scaling methods apply to EUV, says IMEC litho chief
News & Analysis  
2/27/2009   Post a comment
Techniques being used to extend the life of 193-nm lithography appear equally applicable to next-generation extreme ultraviolet lithography, which could greatly increase the extendibility of the technology, according to Kurt Ronse, director of the advanced lithography program at nanoelectronics research center IMEC.
Xilinx unveils two next-gen FPGA families for targeted design platforms
Product News  
2/27/2009   Post a comment
Xilinx's Spartan and Virtex reach 6th generation. See them at Embedded Systems Conference in March.
What is source-mask optimization?
News & Analysis  
2/27/2009   Post a comment
A war of words of sorts emerged at the SPIE Advanced Lithography conference among vendors developing source-mask optimization tools in hopes of extending 193-nm immersion lithography to the 22-nm node.
Hurt by charge, Magma posts $78 million loss
News & Analysis  
2/26/2009   Post a comment
Dragged down by a $60.8 million non-cash goodwill impairment charge, EDA vendor Magma Design Automation posted a net loss of $78.1 million, or $1.73 per share, for the quarter ended Feb. 1.
Mentor posts profit, but will cut jobs
News & Analysis  
2/26/2009   Post a comment
EDA vendor Mentor Graphics posted a profit of $31.5 million on revenue of $242.6 million for the quarter ended Jan. 31, in line with a revenue warning the company issued earlier this month. The company said it plans to cut an unspecified number of jobs as it trims costs amid the economic downturn.
Xilinx Spartan-6 family delivers low-power and high-speed connectivity to cost-sensitive systems
Product News  
2/26/2009   Post a comment
Xilinx unveiled a new generation of its low-cost Spartan FPGA family that integrates ubiquitous connectivity standards for a broad base of cost-sensitive applications.
DSP and microprocessor algorithms re-factored for FPGA acceleration
Product News  
2/26/2009   Post a comment
FPGA image processing design services and IP from Impulse Accelerated Technologies reduces project risk.
Altera's Stratix III selected for largest ASIC prototyping engine
Product News  
2/25/2009   Post a comment
The Dini Group uses Altera's Stratix III in its single-board prototyping engine for custom ASICs that are devoted to wireless communications, networking, and graphics processing.
Module combines Virtex-5 and embedded PowerPC core for high-performance I/O signal processing
Product News  
2/25/2009   Post a comment
Acromag's PMC-VFX modules enable users to offload CPU-intensive operations such as video/3D data processing or floating-point math to improve system performance. See it at Acromag's booth at the Embedded Systems Conference.
Viewpoint: More to IP reuse than software tweaks
Design How-To  
2/25/2009   1 comment
Platform-based design with heavy IP reuse will continue to proliferate as more functionality is included into tomorrow's chip, but differentiation through software alone falls short of power and performance requirements.
Tela Innovations acquires Blaze DFM
News & Analysis  
2/25/2009   Post a comment
Tela Innovations announced it has acquired Blaze DFM.
Verification tools step up
News & Analysis  
2/25/2009   Post a comment
Jasper Design Automation said it is automating IC design verification routines with a new suite of tools.
Updated: Initiative forms around e-beam direct write
News & Analysis  
2/24/2009   Post a comment
The eBeam Initiative, a multi-company effort dedicated to the advancement of e-beam direct-write technology for semiconductor prototyping and low-volume manufacturing, launched at the SPIE Advanced Lithography conference.
Viewpoint: Standard FPGA-based emulation will prevail
Blog  
2/24/2009   1 comment
Moving forward, the standard FPGA-based emulator will ultimately prevail. If nothing else, for economical reasons.
COMMENTARY: Got Configuration Management?
Blog  
2/24/2009   2 comments
Companies that don't adopt appropriate configuration management technology will fail and fall by the wayside!
Software tool automates ECU software checks
Product News  
2/24/2009   Post a comment
Automotive realtime networking expert TTTech Automotive (Vienna) has announced a software tool to validate the consistency of Autosar components in electronic control units (ECUs). TTX-Autoverify increases the engineering efficiency during system integration and thus helps to reduce time-to-market and costs, the vendor claims.
Layout optimization startup Tela buys Blaze DFM
News & Analysis  
2/24/2009   Post a comment
Blaze DFM, the design-for-manufacturing focused startup that was reputed to have closed its doors last December, has been acquired by fellow startup Tela Innovations. Financial details were not disclosed.
Low power verification methodology manual available
News & Analysis  
2/23/2009   Post a comment
The Verification Methodology Manual for Low Power, a collaborative effort between ARM Holdings, Renesas Technology and Synopsys to document a methodology for the comprehensive verification of low power designs, is now available, Synopsys said.
Freescale's Su: Simplify DFM
News & Analysis  
2/23/2009   Post a comment
During a keynote address at the SPIE Advanced Lithography conference, Lisa Su, senior vice president and general manager of networking and multimedia and chief technology officer for Freescale Semiconductor, asked the EDA and lithography communities for help in reigning in spiraling design complexity.
SOFTWARE TOOLS: Mobile Modeling Toolkit facilitates architecture exploration
News & Analysis  
2/23/2009   Post a comment
Mirabilis Design's VisualSim toolkit contains 20 parameterized SoC components, traffic generators, fast custom component creators, and power and performance reports.
At ESC Silicon Valley, survival's in the bag
Product News  
2/23/2009   Post a comment
Books, scholarships, games, training, and more, all in a pretty cool Safari bag--yours if you register quickly for ESC Silicon Valley.
2009 EE Times ACE Awards finalists announced
Product News  
2/23/2009   Post a comment
See the companies, executives, teams, and others selected as ACE Award finalists.
SpringSoft to buy functional qualification startup
News & Analysis  
2/23/2009   Post a comment
Taiwanese EDA vendor SpringSoft has signed a definitive agreement to acquire all outstanding shares of startup Certess, a maker of functional qualification software for the creation of SoCs and integration of intellectual property blocks. Financial details of the agreement were not disclosed.
Cadence offers single license for verification IP
Product News  
2/23/2009   Post a comment
Cadence Design Systems announced the availability of a single-license model that grants verification teams access to its Incisive verification IP portfolio.
SOFTWARE TOOLS: ESL Design Environment speeds development for XDR Memory
News & Analysis  
2/23/2009   Post a comment
CoWare and Rambus joint project enables design of maximum product performance to cut development time and reduce costs
Analysis: Will Synopsys take over the world?
News & Analysis  
2/20/2009   1 comment
While competitors stumble amid the downturn, Synopsys is firing on all cylinders and beating analyst expectations with revenue and profit. Executives say Synopsys' financial strength will drive future marketshare gains. But do customers want an EDA market with one dominant player?
Apache, ST to collaborate on 45-, 32-nm challenges
News & Analysis  
2/20/2009   Post a comment
EDA vendor Apache Design Solutions and chipmaker STMicroelectronics have expanded their existing business relationship and technical collaboration to address the upcoming power and noise challenges associated with 45- and 32-nm designs.
MAXIM lance son centre de design virtuel
News & Analysis  
2/19/2009   Post a comment
Maxim Integrated Products et Transim Technology Corporation (Portland, Oregon) ont collaboré pour le lancement du centre de conception EE-Sim Design Center de Maxim qui utilise la technologie WebSIM de Transim.
Synopsys beats expectations, logs bigger profit
News & Analysis  
2/18/2009   Post a comment
Market-leading EDA vendor Synopsys bested consensus analyst expectations for its most recent quarter, reporting a GAAP net income of $52.4 million on revenue of $339.8 million.
Get answers at ESC to the age-old question: How do they do that?
Product News  
2/18/2009   Post a comment
New, first-time tract at ESC: Meet with guru design teams and find out how they designed some of the most popular devices and programs ever to hit the embedded world.
Teardown ESC: Open-source cell phone
Design How-To  
2/18/2009   3 comments
See what's inside Openmoko's open-source cell phone at the Embedded Systems Conference in San Jose.
Actel rolls out low-cost IGLOO nano starter kit
Product News  
2/18/2009   Post a comment
IGLOO nano starter kit from Actel immediately available for low-power, high-volume designs.
Teardown ESC: Beat your child to a real 3D gaming experience
Product News  
2/18/2009   Post a comment
Check out the teardown of a 3rd SpaceVest from TN Games at ESC in Silicon Valley--your child will envy you.
Teardown ESC: Oregon Scientific's SmartGlobe Deluxe
Product News  
2/18/2009   Post a comment
The SmartGlobe is the first Internet-updatable model of the earth. Check out its innards at the Embedded Systems Conference in San Jose.
Maxim releases online simulation tool to accelerate power-management designs
Product News  
2/18/2009   Post a comment
Maxim Integrated Products and Transim Technology Corporation (Portland, Oregon) have collaborated to launch Maxim's EE-Sim Design Center, powered by Transim's WebSIM online design technology.
Photronics posts wider loss, 15% sales decline
News & Analysis  
2/17/2009   Post a comment
Photomask supplier Photronics posted a larger net loss for the quarter ended Feb. 1, as revenue declined 15 percent compared with the same period of last year.
Power-aware FPGA design (Part 3)
Design How-To  
2/17/2009   Post a comment
This three-part article covers several aspects of FPGA power consumption; it also provides a new look at power dissipation numbers, and questions the traditional methods of estimating and measuring power.
SyEna project to bring automation to analog design
News & Analysis  
2/17/2009   Post a comment
If the researchers involved in the SyEna project are on the right track, analog circuit design is heading for a quantum leap: The project will bring a higher degree of automation to analog design. The researchers promise less faults in the designs and thus more reliable chips.
LSI rolls multicore strategy
Product News  
2/17/2009   Post a comment
LSI Corp. rolled out at the Mobile World Congress a new multicore strategy behind an upcoming family of chips targeting wireless infrastructure gear, mixing and matching its portfolio of cores and on-chip interconnects from recent acquisitions to create new standard products and ASIC offerings.
Confusion begets correction
Blog  
2/17/2009   Post a comment
The case of the disappearing and then reappearing picture.
Selecting the right platform for a media-centric embedded system
News & Analysis  
2/16/2009   Post a comment
Selecting from the many available platforms for a video-enabled embedded application is a daunting task, but this special feature takes designers through the technical and market-driven decision points.
Behavioral Design Drives Low-Power Silicon
Design How-To  
2/16/2009   Post a comment
Using high level synthesis, a design team can implement and verify more functionality in hardware in less time than required for RTL design. This makes it feasible to move system functionality from software into dedicated hardware, reducing the number of instruction fetches and lowering required CPU clock speeds for significant system-level power savings.
Synopsys forms alliance around verification IP
News & Analysis  
2/14/2009   Post a comment
Synopsys has launched a verification IP alliance program with a goal of providing designers with access to a broader range of Verification Methodology Manual-enabled verification IP.
Multicore process technology ready for PrimeTime
News & Analysis  
2/13/2009   Post a comment
Synopsys said it has added a flexible multicore processing technology and new runtime optimizations to the latest release of PrimeTime static timing analysis tool.
New heat sinks claimed to provide unparalleled cooling power
Product News  
2/13/2009   Post a comment
Flared-pin-fin heat sinks from Cool Innovations provide an innovative alternative for natural convection.
We all need to pull together
Programmable Logic DesignLine Blog  
2/13/2009   Post a comment
As usual, Mentor and Xilinx are both setting a really good example as to how big companies can help out and how we all need to pull together...
Video: Computer science meets the grid
News & Analysis  
2/13/2009   Post a comment
Tomorrow's computers need to be designed to meet the energy efficiency needs of growing data centers and the power grid needs to evolve to be more like the Internet, according to Randy Katz, a professor of computer science speaking at an annual gathering of researchers from the University of California at Berkeley.
M4S adopts MDA's M-Design tool for its 40nm design flow
News & Analysis  
2/13/2009   Post a comment
IMEC spin-out, Multi-Mode Multi-Media Solutions (M4S) is to use Mephisto Design Automation NV's M-DESIGN design platform to develop multi-standard wireless chips on a 40nm design flow.
Mentor expands its Displaced Worker Program
News & Analysis  
2/12/2009   Post a comment
Developed in 2002, Mentor's Displaced Worker Program offers free training on a "space available" basis to displaced electronics designers and engineers.
Power-aware FPGA design (Part 2)
Design How-To  
2/11/2009   Post a comment
Analyzing differences in area, timing, and power attributes for different implementations of the same basic design reveals that considering simple, single-cycle power numbers is misleading and even erroneous.
Page 1 / 2   >   >>


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