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posted in February 2010
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Six reasons why no one wants an Atom-based SoC
Blog  
2/26/2010   18 comments
There are plenty of reasons why no one has stepped up yet to use an Intel Atom core in their SoC, but if Intel really wants to be in this business it should take off eventually.
SOFTWARE TOOLS - CoWare SPW boosts signal processing prototyping for advanced wireless systems
Product News  
2/26/2010   Post a comment
CoWare SPW boosts signal processing prototyping for advanced wireless systems and combines LTE libraries with advanced Xilinx implementation flow.
Formal verification set to play significant role in upcoming recovery
Blog  
2/26/2010   Post a comment
As the recovery takes off, Jasper Design Automation said it is excited by the expanding role formal verification technology will play as IC design sizes continue to grow while market windows shrink. One of the facilitators of this paradigm is IP design and reuse, because now virtually all design starts are SoCs that could never be completed without internal and/or third-party IP.
Direct-write litho still facing uphill climb
News & Analysis  
2/26/2010   2 comments
Multiple development efforts focused on e-beam direct-write lithography have reported progress this week at the SPIE Advanced Lithography conference. But, at least according to one prominent lithography researcher, production tools are still a minimum of five years away.
Product How-To: Incorporating quality into reusable IP
Design How-To  
2/26/2010   Post a comment
How do you incorporate quality into reusable IP? This white paper is about how it is done at Arasan Chip Systems, Inc.
Magma tops sales forecasts, posts loss
News & Analysis  
2/25/2010   Post a comment
EDA vendor Magma Design Automation reported sales of $30.7 million for the quarter ended Jan. 31, beating analysts' estimates and the company's own target.
Magma provides EDA for Western China
News & Analysis  
2/25/2010   Post a comment
Chengdu ICC (CDICC), a government-funded organization that promotes integrated circuit (IC) design in Chengdu, China, has opened an IC design center in cooperation with EDA software vendor Magma Design Automation Inc. (San Jose, Calif.).
Mentor unveils thermal characterization, design tool
Product News  
2/24/2010   Post a comment
Mentor Graphics Corp. has introduced FloTHERM IC, a productivity tool for semiconductor package thermal characterization and design.
HARDWARE TOOLS - connectBlue offers Development Kits for Wireless LAN modules OWL221a and OWL222a
Product News  
2/24/2010   Post a comment
connectBlue has launched ten Wireless LAN Development Kits designed to evaluate the connectBlue third generation Wireless LAN modules OWL221a and OWL222a. The kits offer complete system functionality with an out-of-the-box testing capability designed to accelerate the customers' product design, development and delivery.
Mephisto adds usability to analog design platform
Product News  
2/24/2010   Post a comment
For the latest version of its M-Design platform, Mephisto Design Automation NV (Leuven, Belgium) said it has improved functional and usability. Interoperability will be the company's next point of focus.
What if what-if analysis won't work at 28nm?
Design How-To  
2/24/2010   Post a comment
At 28 nm, tried-and-true timing closure methodologies may not work unless timing and extraction tools work seamlessly together.
IPL group releases PDK standard
News & Analysis  
2/24/2010   1 comment
After several false starts, the industry appears to have finally paved a roadmap for interoperable process design kits (PDKs).
HP Labs' Singapore hub aims to advance cloud computing
News & Analysis  
2/24/2010   Post a comment
Hewlett-Packard's latest advanced research facility opening in Singapore today (Wed. Feb. 24) will embark on projects for using cloud computing to alter development of data centers and application design principles.
Comment: ARM must beware the 'tied-selling' trap
Blog  
2/24/2010   1 comment
The success of ARM Holdings plc with its series of low-power processing cores, and its relatively small-scale success - so far - with its Mali graphics processing cores puts ARM in a potentially dangerous position.
New EDA tool release boosts analog and mixed-signal design productivity
Product News  
2/24/2010   Post a comment
Belgian EDA tool innovator, Mephisto Design Automation (MDA) has unveiled its M-DESIGN 3.2 release which offers analog and mixed-signal designers immediate productivity gains for their front-end design tasks.
Altera transitions its 40nm Arria II GX FPGAs to production
Product News  
2/24/2010   Post a comment
Altera announced it is shipping in volume production the first members of its 40nm Arria II GX FPGA family specifically targeting 3-Gbps transceiver applications
Comment: Sparking interest in engineering
Industrial Control DesignLine Blog  
2/23/2010   Post a comment
Intel is behind a $3.5 billion initiative to support investment in U.S.-based growth-oriented industries. The initiative also wants to increase jobs available this year for recent college graduates.
iPhone/iPod dock ref design enables bit-perfect audio streaming
Product News  
2/23/2010   1 comment
An iPhone/iPod dock reference design from XMOS eliminates analog audio processing components, reducing RF interference and enabling bit-perfect digital audio for highest fidelity audio performance.
DAC 2010 to award Richard Newton graduate scholarships
News & Analysis  
2/23/2010   Post a comment
The 47th Design Automation Conference, to be held from June 13 to 18, 2010, in Anaheim, Calif., intends to award scholarships to promote graduate research and study in EDA and circuit design. These $24.000 scholarships are in honor of the memory of Dr. A. Richard Newton.
SystemC configuration requirements spec ready for review
News & Analysis  
2/23/2010   Post a comment
The Open SystemC Initiative (OSCI) has released a draft of requirements for the configuration portion of the SystemC Configuration, Control & Inspection (CCI) standardization effort. It is open for public review until April 2, 2010.
GateRocket rolls new version of FPGA debug tool
Product News  
2/23/2010   Post a comment
FPGA verification and debug software vendor GateRocket Inc. Tuesday (Feb. 23) announced the newest version of its RocketVision debugging software, introducing new capabilities that allow designers to select individual design blocks to run in their simulator or GateRocket's RocketDrive hardware verification system.
Altium claims 500 new U.S. customers in past year
Programmable Logic DesignLine Blog  
2/23/2010   4 comments
Ten months after dramatically cutting the price of its circuit board design tool, Altium says it has added more than 500 customers in the U.S. over the past year.
Mentor Graphics to address variant diversity
Product News  
2/22/2010   Post a comment
With the acquisition of Freescale's Virtual Garage software product line, EDA software vendor Mentor Graphics plans to address two aspect that increasingly complicate automotive electronic designer's work: First, the conflict between added value and costs associated with the complexity of multiple electronics options in cars. The second aspect is the availability of vehicle-specific design data to service workshops — for instance dynamic circuit diagrams.
Custom layout automation tool now compliant with OpenAccess
Product News  
2/22/2010   Post a comment
SpringSoft announced the compliance of its Laker custom layout automation system with the OpenAccess (OA) database standard, offering standard interoperability and a robust ecosystem
High-level synthesis, verification and language
Design How-To  
2/22/2010   2 comments
The preferred high-level design methodology proceeds from high-level code to RTL code. Good verification practice requires that the input to High-level Synthesis (HLS) be verified first, via simulation (or some other analytical means), and then the output of HLS be verified, again via simulation or some other means. Using SystemC as the input language to HLS enables this flow, but using C as the HLS input language imposes a serious limitation on doing verification this way.
Case study: Quality foundation improves Delphi's time to market
Design How-To  
2/22/2010   Post a comment
A case study examines how Delphi Thermal used Siemens' software to improve time to market while reducing non-conformance with auto industry standards.
Scalable integration between OneSpin's ABV tool and Platform LSF
Product News  
2/22/2010   Post a comment
EDA software vendor OneSpin Solutions GmbH (Munich, Germany) has presented the customizable integration between its 360 MV formal assertion-based verification (ABV) tool and Platform Computing's LSF infrastructure, a workload management solution for high performance computing (HPC) environments.
Jasper releases LPDDR, DDR3 proof kits
Product News  
2/22/2010   Post a comment
Verification-focused EDA startup Jasper Design Automation announced the availability of formal verification proof kits for LPDDR1, LPDDR2 and DDR3 SDRAM.
Elementary stealth: EyeClops Night Vision 2.0
News & Analysis  
2/22/2010   1 comment
What was once Cold War surveillance technology is now toy store technology.
SOFTWARE TOOLS - Embedded Workbench for ARM 5.41 achieves 13% performance improvement
Product News  
2/20/2010   Post a comment
The latest release of IAR Systems' Embedded Workbench for ARM is highly optimized for code size and increased execution speed. The company states it performs up to 13 percent better on CoreMark benchmarks for Cortex-M0 compared to the previous version of IAR Embedded Workbench.
EDA chiefs hazard no guesses on 2010 market
News & Analysis  
2/20/2010   3 comments
At the annual EDAC CEO panel, the leaders of EDA's biggest firms discussed trends impacting EDA growth, but left forecasts for the year to the panel's moderator, analyst Jay Vleeschhouwer.
TSMC, Xilinx deal expected at analyst day
News & Analysis  
2/19/2010   Post a comment
Xilinx Inc. will host its annual analyst day in San Francisco on Monday.
Mentor names VP of new ventures
News & Analysis  
2/19/2010   1 comment
Mentor Graphics Corp. announced it has named Serge Leef, current general manager of the System Level Engineering division, as vice president of New Ventures, to expand the company into markets adjacent to EDA.
ISSCC, Nvidia shortfall lead weekly story ranking
News & Analysis  
2/19/2010   Post a comment
Here are the top five online stories for the week beginning Sunday, Feb. 14, as ranked by EE Times readers, up to and including Friday, Feb. 19. The ranking is based on the number of reader "views" or "hits" on a particular article.
Facilitating at-speed test at the register transfer level
Design How-To  
2/19/2010   Post a comment
This white paper discusses at-speed testing challenges and discusses a solution for facilitating at-speed test at the register-transfer level.
Silicon Frontline enhances post-layout verification tools
Product News  
2/19/2010   Post a comment
Startup Silicon Frontline Technology, Inc. has introduced the latest versions of its products for post-layout verification: F3D (Fast 3D) for fast 3D extraction and R3D (Resistive 3D) for 3D extraction and analysis of large resistive structures like power devices.
Altium and Nanosoft are actively recruiting resellers to expand Russian sales channel
News & Analysis  
2/19/2010   Post a comment
Altium has appointed Nanosoft as its new value added distributor in a rapid expansion of its business in Russia and the Commonwealth of Independent States (CIS)
What made you become an EE? Join the Conversation
Blog  
2/18/2010   27 comments
In honor of National Engineers Week, we ask readers what inspired them to become engineers and what can be done to encourage more young people to join the ranks.
Jasper, EASii team to foster formal verification
News & Analysis  
2/18/2010   Post a comment
Jasper Design Automation Inc. (Mountain View, Calif.) and France's electronic design company EASii IC have joined forces to boost the adoption of formal verification methods in Europe.
Imec collaborates with Mephisto Design Automation on mixed-signal design for reconfigurable radios
News & Analysis  
2/18/2010   Post a comment
IMEC, the independent nanoelectronics research center headquartered in Leuven, Belgium, is to collaborate with Mephisto Design Automation (MDA) to develop mixed-signal design for reconfigurable radios within IMEC's green radios program by using MDA's customer proven product M-DESIGN.
Tanner EDA, Sound Design Technologies develop PDKs
Product News  
2/18/2010   Post a comment
Tanner EDA, a division of Tanner Research Inc. (Monrovia, Calif.), announced it has combined its specialized IC design software combined with integrated passives and chip-stacking technologies from Sound Design Technologies Ltd. (Ontario, Canada).
Analyst raises sales estimates for Altera
News & Analysis  
2/18/2010   Post a comment
A technology research firm raised its estimates for Altera's 2010 and 2011 revenue, citing expectations of modest market share gains by the company against rivals in the programmable logic space.
Reusable VHDL IP in the real world
Design How-To  
2/17/2010   3 comments
IP reuse is clearly a good thing. But in practice it has often proven surprisingly difficult to achieve. This article provides few principles and techniques that can be applied to make it more straightforward.
TI's multicore SoC: Right notes, ringing hollow
Signal Processing DesignLine Blog  
2/17/2010   Post a comment
While the new multicore system on chip (SoC) signal-processing architecture announced by Texas Instruments this week at Mobile World Congress hits all the right notes with respect to what's needed in next-generation basestation designs, it rings a bit hollow given how sketchy the architectural details remain when contrasted with more 'real' announcements from the likes of Freescale.
Synopsys' profit jumps on IRS settlement
News & Analysis  
2/17/2010   Post a comment
Market-leading EDA vendor Synopsys saw its profit for the quarter ended Jan. 31 jump thanks to a settlement with the U.S. Internal Revenue Service, even as sales declined for the period.
A dissenting opinion on the 'programmable imperative'
Programmable Logic DesignLine Blog  
2/17/2010   Post a comment
Jack Harding, CEO of ASIC design and services provider eSilicon, has a simple question for those who say FPGAs are displacing ASICs: Where is the money?
Eeeeek! My FPGA's not working: Problems with the *IP*
Design How-To  
2/17/2010   Post a comment
In my previous post I waffled on about the challenge of RTL mismatches in an FPGA methodology. This week we'll look at how using third-party IP can also introduce some nasty little issues...
Intrinsic-ID names VP of North America sales
News & Analysis  
2/17/2010   Post a comment
IP provider Intrinsic-ID NV (Eindhoven, The Netherlands) announced it has appointed Tim Smith as vice president of sales in North America.
Help — All of my simulations are passing!
Blog  
2/17/2010   Post a comment
Pause and consider for a moment a world in which passing tests are not an indicator that all is well, but rather a warning flag that not enough functionality is being tested, vital checks that confirm proper operation of the design are missing, or problems in the verification infrastructure are masking test failures and hiding RTL bugs merrily making their way to fabrication.
EU project to define next gen design methodologies
Product News  
2/17/2010   Post a comment
Scientists and companies from Europe and Brazil have joined forces in an EU-backed project that aims to develop design methods and EDA tools in a view to remove the limitations in physical implementation effectiveness associated with technology scaling and advanced sub-wavelength lithography.
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