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posted in March 2005
IEEE moves to create EDA council
News & Analysis  
3/31/2005   Post a comment
The IEEE is moving toward the creation of a council that would serve as the focal point for all of the organization's electronic design automation (EDA)activities.
Mentor donates library to standards organization
News & Analysis  
3/31/2005   Post a comment
Mentor Graphics has donated its SystemVerilog Assertion (SVA) version of the Open Verification Library (OVL) to Accellera, the organization for electronic design industry standards.
Test
News & Analysis  
3/30/2005   Post a comment
Enhanced PLL circuit design tool can cut design cycles by 80%
Product News  
3/30/2005   Post a comment
Analog Devices Inc. said that its latest version of its PLL circuit design and evaluation tool helps designers cut design cycles by up to 80 percent. The ADIsimPLL version 2.7 features enhanced synthesis and simulation capabilities, expanded libraries and Web access, streamlining the RF development process for users of ADI's fractional-N and integrated VCO/PLL products.
Prover eCheck validated for Actel's Libero IDE
News & Analysis  
3/30/2005   Post a comment
Prover Technology's eCheck equivalence checker has been validated for design verification in Actel's Libero integrated design environment.
Hard macro tool accelerates verification cycle time
Product News  
3/29/2005   Post a comment
QuickLogic's QuickWorks version 9.7 has been enhanced with a hard macro tool, allowing designers of it uWatt FPGA, programmable bridging and programmable SoC products to take their design or pieces of their design and harden it so that functions like timing, placement and routing, are always fixed.
Semiconductor Testing Pushes Zero Defects
Design How-To  
3/28/2005   Post a comment
As electronic content in automobiles continues to increase, tighter quality control over semiconductor parts is a necessity.
Mixed signal power control is programmable and non volatile
Product News  
3/26/2005   Post a comment
System designers benefit from the combination of non volatile programmable logic and special functions, especially analog.
Software emulates TI chipset
Product News  
3/26/2005   Post a comment
Virtio released a platform to provide pre-silicon emulation for TI's OMAPV1030 GSM/GPRS/EDGE chipset, including the on-chip GSM subsystem.
Schematic, PCB tools get upgrade
News & Analysis  
3/25/2005   Post a comment
Low-cost pc-board design systems from Altium Ltd. and Electronics Workbench are claiming new capabilities. Common to both is increased support for "variants," or multiple variations of original PCB designs.
90-nm-Fertigung verlangt neue Strategien zur Qualitätssicherung
Product News  
3/24/2005   Post a comment
90-nm-Fertigung verlangt neue Strategien zur Qualitätssicherung
TSMC exec calls for proactive measures on IP
News & Analysis  
3/23/2005   Post a comment
A Taiwan Semiconductor Manufacturing Co. Ltd. executive described a blueprint for how intellectual property vendors should deal with the fabless semiconductor industry.
Initiative stellt Low-Power-Design-Kette zur Verfügung
News & Analysis  
3/23/2005   Post a comment
Um mehr als 40 Prozent senken neue Low-Power-Designverfahren die Leistungsaufnahme. Die Verfahren sind Ergebnis der Zusammenarbeit zwischen mehreren Unternehmen, die sich in der 'Silicon Design Chain Intitaive zusammengeschlossen haben. Die einzelnen Teillösungen setzen jeweils an unterschiedlichen Stellen der Designkette an.
Proactive approach needed to overcome 90-nm quality challenges, experts say
News & Analysis  
3/23/2005   Post a comment
Speakers at the International Symposium on Quality Electronic Design spotlighted challenges faced by design teams and process engineers as they move to 90 nm and beyond.
Simulator enhanced for RFIC, MMIC, and RF system-in-package design
Product News  
3/22/2005   Post a comment
Circuits that could not previously be simulated are being achieved with the latest simulation technologies for the company's Advanced Design System (ADS) and RF Design Environment (RFDE) simulation software packages.
Magma launches Indian EDA training effort
News & Analysis  
3/22/2005   Post a comment
Seeking exposure for its EDA tools in India, Magma Design Automation's Indian unit has joined the Indian Institute of Technology in Madras.
Low-power flow enables multi-supply voltage ICs
News & Analysis  
3/21/2005   Post a comment
Representatives from Cadence Design Systems, ARM, and TSMC describe a 90 nm design methodology that claims to minimize dynamic and static power, and ease the development of multi-supply voltage (MSV) ICs.
Software automatisiert Anforderungsmanagement
News & Analysis  
3/21/2005   Post a comment
Telelogic Software stellt mit 'Doors XT' ein Produkt vor, welches das Anforderungsmanagement verwaltet. Dabei unterstützt es auch weltweit verteilte Design-Teams.
Cooperation may set standard for all embedded VoIP
Product News  
3/20/2005   Post a comment
VoIP telephone adapters for the worldwide market may set a benchmark standard for device and IP interoperability
A l’horizon de la 42ème édition de la DAC
News & Analysis  
3/18/2005   Post a comment
Désignant deux célèbres technologues de CAO, la Design Automation Conference (DAC) a annoncé que les discours d’introduction seraient prononcés par Bernard Meyerson, vice-président et directeur technique du Groupe systèmes et technologie d’IBM, et Ron Rohrer, vice-président du groupe de recherche et développement avancé chez Cadence Design Systems.
Wipro et Cadence renouvellent leur accord de CAO
News & Analysis  
3/17/2005   Post a comment
A la conquête du marché croissant de la conception de circuits intégrés en Inde, Cadence Design Systems Inc. a renouvelé un accord autorisant Wipro Technologies (Inde) à accéder à son logiciel de CAO. Cadence a également annoncé que Wipro avait sorti sa plus grande puce à ce jour en utilisant la suite d’outils SoC Encounter de Cadence.
DAC taps EDA technologists for keynotes
News & Analysis  
3/17/2005   Post a comment
The Design Automation Conference (DAC) announced that this year's keynote speeches will be given by two noted EDA technologists — IBM's Bernard Meyerson and Cadence Design Systems' Ron Rohrer.
Wipro, Cadence renew EDA agreement
News & Analysis  
3/16/2005   Post a comment
Cadence Design Systems Inc. has renewed an agreement giving India-based Wipro Technologies access to its electronic design automation technologies.
Interview CAO avec Jeong-Taek Kong de Samsung
Blog  
3/15/2005   Post a comment
EE Times a interrogé Jeong-Taek Kong, vice-président chargé de la CAO au centre de R&D sur les semi-conducteurs de Samsung Electronics Co. Ltd., sur les défis de la CAO et des possibilités de l’ère de la nanotechnologie.
DATE-Rückblick: Jede Menge Lösungen für SoC-Entwicklung
News & Analysis  
3/15/2005   Post a comment
Die Entwicklung von hochleistungsfähigen System-on-Chip-Designs (SoC) für die Massenproduktion hat es in sich. Gibt es nicht bald einen Durchbruch vom System-Level-Design bis hin zur Fertigung, könnte der Ansatz zum Scheitern verurteilt sein.
Cool EDA products light up 2005
Product News  
3/15/2005   Post a comment
There's something for everyone in this column, which reviews significant 2005 rollouts for both hardware and software designers.
Synopsys unveils 'next-gen' compiler for physical design
News & Analysis  
3/14/2005   Post a comment
Synopsys Inc. has unveiled a physical design solution the company claims provides leading-edge performance and already carries endorsements by key IC suppliers.
A methodology for IC power grid design
Design How-To  
3/11/2005   Post a comment
Power grid noise is a serious problem for nanometer chip designs. Apache Design Solutions' Aveek Sarkar shows how you can develop a power-aware physical design methodology that helps avoid noise-induced design failures.
A methodology for DSP-based FPGA design
Design How-To  
3/9/2005   Post a comment
FPGAs can greatly speed DSP algorithms, but you need a methodology for getting those algorithms into silicon. Synplicity authors including Dirk Seynhaeve (right) outline an approach that combines Simulink with DSP synthesis.
FPGAs helps embed wireless phone functions
Product News  
3/9/2005   Post a comment
Embedded wireless VoIP and VoWLAN handheld Wi-Fi phone reference design for 802.11b/g
"FPGAs können ASICs nicht das Wasser reichen"
Product News  
3/8/2005   Post a comment
Vor dem Hintergrund immer kürzerer Entwicklungszyklen und steigender Komplexität in den Chipdesigns plädierte Garry Hughes, Vice President von IBMs ASIC Development and Design Centers, auf der DATE in München für die Verwendung von ASICs. Trotz hoher Maskenkosten seien FPGAs keine wirkliche Konkurrenz, sagte Hughes gegenüber EE Times.de.
Durchgängiger Design Flow macht den Unterschied
Special Report  
3/8/2005   Post a comment
Der Entwurf moderner HF-Übertragungssysteme stellt Designer vor immer neue Herausforderungen. Neben höheren Datenraten mit immer aufwändigeren Modulationstechniken und höheren Trägerfrequenzen kommt für zukünftige Systeme die Multistandardfähigkeit hinzu.
New support for ARM, MIPS and PowerPC processors
Product News  
3/8/2005   Post a comment
New CPU Support Offers Maximum Choices for new Product Development
EDA-Industrie braucht neue Geschäftsmodelle
Blog  
3/7/2005   Post a comment
Die Komplexität der Schalkreise explodiert förmlich, im Gleichtakt damit werden die Software-Werkzeuge für das Chipdesign immer komplexer. Doch die Industrie, die diese Werkzeuge herstellt, tritt wirtschaftlich auf der Stelle. Professor Erich Barke, ein Vordenker der Branche, fordert neue Geschäftsmodelle – und dass sich diese Branche endlich in betriebswirtschaftlichen Größen definiert.
Prototyping-Plattform beschleunigt PsoC-Entwicklung
News & Analysis  
3/4/2005   Post a comment
Der EDA-Anbieter Celoxica gibt die Verfügbarkeit einer neuen Prototyping- und Entwicklungs-Plattform für programmierbare SoCs bekannt. Die RC250 ergänzt die RC-Serie von Celoxica und ist mit einem sofort einsatzbereiten Paket aus ESL-Designsoftware, IP und System-Level-APIs zur raschen Exploration und Implementierung von Systemen ausgestattet.
Development kit speeds migration to 32-bit ARM MCUs
Product News  
3/3/2005   Post a comment
Atmel Corp. and IAR Systems AB are offering a full featured ARM development kit for $295. The development kit supports Atmel's ARM7-based MCU called the AT91SAM7S32.
Turning software into hardware
News & Analysis  
3/2/2005   Post a comment
CriticalBlue's Cascade product generates custom co-processors from embedded software. Here's how it works, and why it may be useful.
Cadence-Chef: EDA-Marketing muss sich ändern
Product News  
3/2/2005   Post a comment
EDA-Unternehmen müssen kundenorientierter denken und damit aufhören, ihre Kunden mit "Techno-Gebrabbel einzulullen". Das forderte jetzt Michael J. Fister, President und CEO von Cadence, beim Besuch der unternehmenseigenen Forschungszentren in Bangalore und Noida nahe New Dehli.
DATE: Startup zeigt RTL-Closure-Upgrade
News & Analysis  
3/2/2005   Post a comment
Auf der 'Design Automation and Test Europe (DATE)' nächste Woche in München will Stelar Tools, ein mit Risikokapital finanzierter EDA-Startup, eine verbesserte Version seines HDL Explorer vorstellen.
Mixed-Signal Technologies Spur In-Vehicle Networking
Design How-To  
3/1/2005   Post a comment
Integration leads to greater fuel economy and reduced emissions.
Prosilog intègre le composant eVC OCP de Yogitech dans Magillem
News & Analysis  
3/1/2005   Post a comment
Prosilog SA, société française spécialisée dans le développement et la commercialisation d’outils pour la conception de systèmes sur puce, annonce l’intégration du composant de vérification eVC pour OCP de Yogitech dans Magillem, son outil graphique de conception de systèmes sur puce.
Mentor, Via to collaborate on chipset reference designs
News & Analysis  
3/1/2005   Post a comment
Mentor Graphics Corp. has announced a collaboration with Via Technologies Inc. to provide reference designs for use with the Expedition series design flow for Via's P4M800/Pro, PT894/Pro and K8T890/Pro next-generation chipsets.
Fast, full-function emulation for TI's OMAP2420 software development platform
Product News  
3/1/2005   Post a comment
Virtual platform lets codesmiths run application code long before hardware becomes available.
Cold hard data that's deep
Product News  
3/1/2005   Post a comment
Memory systems available to embedded systems designers can be so vast, data base managment IP and tools are emerging to make embedded applications SQL compatible.
Timing analysis needs overhaul, speaker says
News & Analysis  
3/1/2005   Post a comment
New IC devices, circuits, and physical effects will drive a new generation of timing analysis tools, said David Hathaway, senior technical staff member for EDA at IBM Microelectronics, at a keynote speech at the Tau timing workshop here Monday (Feb. 28).


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Tired Old iPad 2 vs. Shiny New iPad Air 2
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Vincent Valentine is a man on a mission. He wants to make the first house to ever have a telephone into a telephone museum. Without help, it may not happen.

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As every developer knows, there are the paper specifications for a product design, and then there are the real requirements. The paper specs are dry, bland, and rigidly numeric, making ...

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