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posted in April 2006
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Cadence, Mentor top 52-week highs as Magma slips
News & Analysis  
4/28/2006   Post a comment
After three of EDA's largest companies posted quarterly earnings this week, investors reacted, rewarding Cadence Design Systems and Mentor Graphics while punishing Magma Design Automation.
Tool claims first transistor-level closed loop PLL verification
News & Analysis  
4/28/2006   Post a comment
Claiming an industry first, EDA startup Xpedion Design Systems ntroduced a transistor-level phase-locked loop solution for verifying complete closed loop noise and jitter.
Circuit simulator optimized for sub-circuit type Spice models
News & Analysis  
4/28/2006   Post a comment
Intellectual property characterization and circuit simulation software provider Legend Design Technology has optimized its MSIM circuit simulator to perform faster than conventional simulators when using a "sub-circuit-type Spice model" for nanometer technology, the company said.
Sequence offers enhanced power-grid verification products
Product News  
4/27/2006   Post a comment
Power-focused EDA provider Sequence Design has released enhanced versions of its CoolTime and CoolCheck power-grid verification products.
ATI set to double Indian R&D staff size
News & Analysis  
4/27/2006   Post a comment
Graphics chip firm ATI Technologies has readied a new center in Hyderabad in southern India, where it first set up shop less than a year ago. The new center can accomodate more than twice ATI's 175-person staff in Hyerabad.
Magma's revenue soars, but loss widens
News & Analysis  
4/27/2006   Post a comment
Partially blaming litigation expenses tied to its high-profile litigation with Synopsys, Magma Design Automation posted record revenue but a widening loss for both the fiscal year and the quarter.
Cadence 'segments' PCB product line
Product News  
4/27/2006   Post a comment
Cadence Design Systems has segmented its Allegro PCB product line into three different "tiers" representing different price levels and capabilities. Cadence is also rolling out a new version of its Design Workbench data management product, and a new Design Publisher tool that places designs into PDF files.
Execs applaud as Cadence revenue, income surge
News & Analysis  
4/27/2006   Post a comment
Executives from Cadence Design Systems characterized the first quarter as a good one in all respects after the EDA market leader posted a healthy 12 percent year-to-year revenue increase and a strong surge in net income.
Mentor posts first quarter loss; bumps guidance
News & Analysis  
4/26/2006   Post a comment
Blaming the cost of convertible debt refinancing and expense reduction initiatives, Mentor Graphics posted a GAAP net loss of $5.8 million on revenue of $176.3 million for the first quarter.
Cadence reports 12% year-to-year revenue increase; income up
News & Analysis  
4/26/2006   Post a comment
Cadence Design Systems posted a healthy year-to-year increase of 12 percent in fourth quarter revenue and a dramatic increase in net income, the company said.
Encirq improves data-centric software framework
Product News  
4/26/2006   Post a comment
Encirq Corp. has launched Version 2.2 of its data-centric software framework for embedded applications. Enhancements include user-extensible indexing that gives designers the flexibility to implement customized indexing strategies to achieve the best possible search performance for a given application.
Cadence, PDF in DFM collaboration
News & Analysis  
4/26/2006   Post a comment
EDA market leader Cadence Design Systems plans to collaborate with process-design integration technology provider PDF Solutions on design-for-manufacturing technology and products to improve IC manufacturability, yield and reliability, the companies said.
Analysis: Battle lines drawn in Synopsys-Magma court fight
News & Analysis  
4/26/2006   Post a comment
The interpretation of District Court Judge Maxine Chesney on six key issues could hold the key to the outcome of the Synopsys-Magma patent dispute.
Synplicity posts loss, trims guidance
News & Analysis  
4/25/2006   Post a comment
EDA vendor Synplicity posted a first quarter GAAP net loss of $1.2 million on revenue of $14.5 million. The company also reduced 2006 guidance slightly following a business re-focus last month.
Lattice releases ispLever 6.0 FPGA design tools
Product News  
4/25/2006   Post a comment
ispLever 6.0 includes new productivity-enhancing design planning and support for Lattice's latest 90nm FPGA families and IPexpress solutions.
Role of IBM engineer pivotal to Synopsys-Magma case
News & Analysis  
4/25/2006   Post a comment
Following Synopsys' opening argument, the complex patent infringement trial it brought against Magma Design Automation appears to hinge largely on two-year joint development between Synopsys and IBM.
Design Automation Conference outlines program
News & Analysis  
4/24/2006   Post a comment
The Design Automation Conference (DAC) has announced the program for the July 24-28, 2006 event. Included is a keynote speech by Hans Stork, Texas Instruments CTO (shown).
Workstation uses Opteron CPU and FPGA module to accelerate C algorithms
Product News  
4/24/2006   Post a comment
Changing the way computing is done with a supercomputer on everyone's desk!
Temperature-aware design for mixed-signal ICs
Design How-To  
4/24/2006   Post a comment
Analog circuits in mixed-signal IC designs can be sensitive to a temperature difference of just a few degrees, say authors from Gradient Design Automation. They present a design flow that can help predict and avoid problems due to thermal gradients.
Synopsys, Magma court battle set to tip-off Monday
News & Analysis  
4/22/2006   Post a comment
After an extended war of words that has lasted for more than 18 months, the Synopsys-Magma patent trial is set to start Monday in San Francisco.
Kozio test software supports Freescale's PowerQUICC II Communications processor family
Product News  
4/21/2006   Post a comment
Kozio Inc. is now supporting Freescale's PowerQUICC II communications processor family. Turnkey Kozio test software for MPC82xx-based custom boards can be delivered in just two weeks .
Sequence expects to turn profit
News & Analysis  
4/21/2006   Post a comment
Privately-held EDA company Sequence Design said it expects to become profitable this year as it jockeys to create a larger global footprint in design solutions.
MIPS' revenue tops five-year high, but misses target
News & Analysis  
4/20/2006   Post a comment
MIPS Technologies reported a net income of $2.2 million on revenue of $17.5 million for its fiscal third quarter, which ended March 31.
Stock-based compensation accounting drags on PDF
News & Analysis  
4/20/2006   Post a comment
Thanks to $2.2 million in stock-based compensation expense, PDF Solutions posted a sharp decline in first quarter net income of 76 percent year-to-year and 87 percent sequentially, despite record revenue.
Mentor opens design lab at Russian university
News & Analysis  
4/20/2006   Post a comment
Mentor Graphics has opened a design laboratory at the Moscow Institute of Electronic Technology in Zelenograd, Russia. The center will train electronic design students to use the company's EDA tools.
Book describes writing testbenches using SystemVerilog
Product News  
4/20/2006   Post a comment
A book about writing testbenches using SystemVerilog, written by Synopsys' Janick Bergeron, has been published by Springer Science + Business Media.
Applied Materials-backed DFM startup emerges
News & Analysis  
4/20/2006   Post a comment
Takumi Technology, startup backed by Applied Materials Inc. and others, surfaced to announce that NEC Electronics recently completed development of a mask data preparation flow utilizing its proprietary technology, known as Critically Aware.
Austria Microsystems sets up design center in India
News & Analysis  
4/20/2006   Post a comment
Analog IC design and manufacturing company Austria Microsystems has set up a development center at Hyderabad in southern India and plans to invest between $40 million and $50 million into this effort.
How to build reliable FPGA memory interface controllers without writing your own RTL code!
Design How-To  
4/19/2006   Post a comment
What if a designer could simply use a GUI to input the memory system parameters and generate RTL code for use in an FPGA without writing it from scratch?
Diverse evaluation kits expedite RF designs
Product News  
4/18/2006   Post a comment
Developing VHF/UHF/microwave RF circuitry, feedlines, matching circuits, and antennas can be daunting—and expensive. But it doesn’t have to be. Board-level evaluation and reference designs, using a chip maker’s devices, can make it easier to tackle digital RF product development. eeProductCenter Senior Tech Editor Alex Mendelsohn takes a look at some recent eval boards.
Startup adopts Cadence X Architecture
News & Analysis  
4/18/2006   Post a comment
EDA market leader Cadence Design Systems and chip maker Teranetics announced a design collaboration for implementation of Teranetics' 10-gigabit Ethernet chips using the X Architecture.
Vast offers Renesas SH2A virtual processor model
News & Analysis  
4/18/2006   Post a comment
Virtual system prototyping technology provider Vast Systems Technology announced the availability of a virtual processor model of the SH2A CPU core from Japan's Renesas Technology.
Matlab adds support for 64-bit Windows XP
Product News  
4/18/2006   Post a comment
The MathWorks released a new version of its flagship product, Matlab, including support for Windows XP Professional x64 Edition.
Vast names new GM of European operation
News & Analysis  
4/17/2006   Post a comment
Virtual system prototyping technology provider Vast Systems Technology named Jean-Marc Talbot general manager of its European operation, Vast Europe.
Pintail, German software vendor team on test improvement
News & Analysis  
4/17/2006   Post a comment
Yield learning software startup Pintail Technologies has entered into a marketing and technology agreement with Germany's optimiSE GmbH, whereby Pintail will market optimiSE's test improvement solutions to the semiconductor industry on an exclusive, worldwide basis.
A hierarchy of needs for SoC IP reuse
News & Analysis  
4/17/2006   Post a comment
Taking a page from Abraham Maslow, IPextreme CEO Warren Savage explores a "hierarchy of needs" for intellectual property integrators, and shows how these needs can be met.
Incentia adds on-chip-variation analysis to TimeCraft
News & Analysis  
4/17/2006   Post a comment
Incentia Design Systems announced the availability of a new release of its TimeCraft software, featuring a new on-chip-variation capability for improving the accuracy and efficiency of static timing analysis for 90- and 65-nanometer designs.
Spiral inductor modeling for RF ICs
Design How-To  
4/17/2006   Post a comment
Even a "simple" IC inductor isn't, at RF frequencies, understand the models and tools to minimize surprises
Startup looks to hit ground running with two-pronged model
News & Analysis  
4/17/2006   Post a comment
Key ASIC, a six-month old startup with plans to be both a fabless ASIC provider and an intellectual property and design-for-manufacturing services vendor, plans to turn a profit this year.
Startup joins ARM Connected Community
News & Analysis  
4/17/2006   Post a comment
Startup simulation and analysis EDA tool provider Nascentric has joined the ARM Connected Community, the network of companies aligned to provide solutions for products based on the ARM architecture.
Static timing analyzer adds advanced OCV
News & Analysis  
4/17/2006   Post a comment
Incentia Design Systems has added an "advanced" on-chip variation capability to its TimeCraft static timing-analysis tool, claiming the function's variable derating capability poses advantages over traditional OCV methods.
Kit offers power-based architecture exploration
Product News  
4/14/2006   Post a comment
System design tool vendor Mirabilis Design plans to introduce a power modeling toolkit for its VisualSim Architect graphical software application for concept engineering through performance analysis and architecture exploration.
Software automates requirements-management for embedded code developers
Product News  
4/14/2006   Post a comment
A next-generation requirements-management tool can help development teams crafting embedded software overcome problems mapping test specifications, unit test scenarios, test data, and code coverage verification, with high level requirements and design requirements.
ARM926EJ-based platform validated on UMC's 90-nm process
News & Analysis  
4/13/2006   Post a comment
Design services and platform solutions provider Socle Technology has validated in silicon its ARM926EJ-based SoC platform on UMC's 90-nanometer process.
Cadence, SMIC offer analog/mixed-signal reference flow
News & Analysis  
4/13/2006   Post a comment
EDA market leader Cadence Design Systems and Chinese foundry Semiconductor Manufacturing International Corp. have jointly developed an analog/mixed-signal reference flow to address the needs of designers developing ICs for the consumer, networking and wireless markets.
Using complex triggers in an FPGA-based RTL debugger
Design How-To  
4/12/2006   Post a comment
This tutorial describes techniques for using highly sophisticated trigger mechanisms that can be used to isolate just those events that are germane to a particular problem.
OpenAccess adoption still limited, says panel
News & Analysis  
4/12/2006   Post a comment
Interest in OpenAccess among chip designers remains high, though actual adoption continues to be limited, according to a panel of executives at the 8th OpenAccess+ Conference.
EDA industry needs to take responsibility, Madhavan says
News & Analysis  
4/12/2006   Post a comment
Magma Design Automation's Rajeev Madhavan (shown) said Tuesday that the EDA industry needs to provide greater automation in order to see revenue growth.
OCP-IP releases OCP SystemC Channel version 2.1.2
News & Analysis  
4/11/2006   Post a comment
Open Core Protocol International Partnership announced the availability of the SystemC Transaction Level Monitor Channel version 2.1.2. New features in version 2.1.2 improve model interoperability, resulting in better productivity in system level modeling, according to OCP-IP.
Synplify Pro claims performance boost for Stratix II customers
Product News  
4/11/2006   Post a comment
Claiming better "quality of results" than previous versions, EDA vendor Synplicity said it has enhanced the latest version of its FPGA synthesis tool to provide enhanced support for Altera's Stratix II and Stratix II GX FPGAs.
Page 1 / 2   >   >>


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Max Maxfield

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No 2014 Punkin Chunkin, What Will You Do?
Martin Rowe
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Rich Quinnell

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Rich Quinnell
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Book Review: Controlling Radiated Emissions by Design
Martin Rowe
1 Comment
Controlling Radiated Emissions by Design, Third Edition, by Michel Mardiguian. Contributions by Donald L. Sweeney and Roger Swanberg. List price: $89.99 (e-book), $119 (hardcover).