Circuit simulator optimized for sub-circuit type Spice models News & Analysis 4/28/2006 Post a comment Intellectual property characterization and circuit simulation software provider Legend Design Technology has optimized its MSIM circuit simulator to perform faster than conventional simulators when using a "sub-circuit-type Spice model" for nanometer technology, the company said.
ATI set to double Indian R&D staff size News & Analysis 4/27/2006 Post a comment Graphics chip firm ATI Technologies has readied a new center in Hyderabad in southern India, where it first set up shop less than a year ago. The new center can accomodate more than twice ATI's 175-person staff in Hyerabad.
Magma's revenue soars, but loss widens News & Analysis 4/27/2006 Post a comment Partially blaming litigation expenses tied to its high-profile litigation with Synopsys, Magma Design Automation posted record revenue but a widening loss for both the fiscal year and the quarter.
Cadence 'segments' PCB product line Product News 4/27/2006 Post a comment Cadence Design Systems has segmented its Allegro PCB product line into three different "tiers" representing different price levels and capabilities. Cadence is also rolling out a new version of its Design Workbench data management product, and a new Design Publisher tool that places designs into PDF files.
Execs applaud as Cadence revenue, income surge News & Analysis 4/27/2006 Post a comment Executives from Cadence Design Systems characterized the first quarter as a good one in all respects after the EDA market leader posted a healthy 12 percent year-to-year revenue increase and a strong surge in net income.
Encirq improves data-centric software framework Product News 4/26/2006 Post a comment Encirq Corp. has launched Version 2.2 of its data-centric software framework for embedded applications. Enhancements include user-extensible indexing that gives designers the flexibility to implement customized indexing strategies to achieve the best possible search performance for a given application.
Cadence, PDF in DFM collaboration News & Analysis 4/26/2006 Post a comment EDA market leader Cadence Design Systems plans to collaborate with process-design integration technology provider PDF Solutions on design-for-manufacturing technology and products to improve IC manufacturability, yield and reliability, the companies said.
Synplicity posts loss, trims guidance News & Analysis 4/25/2006 Post a comment EDA vendor Synplicity posted a first quarter GAAP net loss of $1.2 million on revenue of $14.5 million. The company also reduced 2006 guidance slightly following a business re-focus last month.
Temperature-aware design for mixed-signal ICs Design How-To 4/24/2006 Post a comment Analog circuits in mixed-signal IC designs can be sensitive to a temperature difference of just a few degrees, say authors from Gradient Design Automation. They present a design flow that can help predict and avoid problems due to thermal gradients.
Sequence expects to turn profit News & Analysis 4/21/2006 Post a comment Privately-held EDA company Sequence Design said it expects to become profitable this year as it jockeys to create a larger global footprint in design solutions.
Applied Materials-backed DFM startup emerges News & Analysis 4/20/2006 Post a comment Takumi Technology, startup backed by Applied Materials Inc. and others, surfaced to announce that NEC Electronics recently completed development of a mask data preparation flow utilizing its proprietary technology, known as Critically Aware.
Diverse evaluation kits expedite RF designs Product News 4/18/2006 Post a comment Developing VHF/UHF/microwave RF circuitry, feedlines, matching circuits, and antennas can be dauntingand expensive. But it doesn’t have to be. Board-level evaluation and reference designs, using a chip maker’s devices, can make it easier to tackle digital RF product development. eeProductCenter Senior Tech Editor Alex Mendelsohn takes a look at some recent eval boards.
Startup adopts Cadence X Architecture News & Analysis 4/18/2006 Post a comment EDA market leader Cadence Design Systems and chip maker Teranetics announced a design collaboration for implementation of Teranetics' 10-gigabit Ethernet chips using the X Architecture.
Pintail, German software vendor team on test improvement News & Analysis 4/17/2006 Post a comment Yield learning software startup Pintail Technologies has entered into a marketing and technology agreement with Germany's optimiSE GmbH, whereby Pintail will market optimiSE's test improvement solutions to the semiconductor industry on an exclusive, worldwide basis.
Incentia adds on-chip-variation analysis to TimeCraft News & Analysis 4/17/2006 Post a comment Incentia Design Systems announced the availability of a new release of its TimeCraft software, featuring a new on-chip-variation capability for improving the accuracy and efficiency of static timing analysis for 90- and 65-nanometer designs.
Startup joins ARM Connected Community News & Analysis 4/17/2006 Post a comment Startup simulation and analysis EDA tool provider Nascentric has joined the ARM Connected Community, the network of companies aligned to provide solutions for products based on the ARM architecture.
Static timing analyzer adds advanced OCV News & Analysis 4/17/2006 Post a comment Incentia Design Systems has added an "advanced" on-chip variation capability to its TimeCraft static timing-analysis tool, claiming the function's variable derating capability poses advantages over traditional OCV methods.
Kit offers power-based architecture exploration Product News 4/14/2006 Post a comment System design tool vendor Mirabilis Design plans to introduce a power modeling toolkit for its VisualSim Architect graphical software application for concept engineering through performance analysis and architecture exploration.
Cadence, SMIC offer analog/mixed-signal reference flow News & Analysis 4/13/2006 Post a comment EDA market leader Cadence Design Systems and Chinese foundry Semiconductor Manufacturing International Corp. have jointly developed an analog/mixed-signal reference flow to address the needs of designers developing ICs for the consumer, networking and wireless markets.
OCP-IP releases OCP SystemC Channel version 2.1.2 News & Analysis 4/11/2006 Post a comment Open Core Protocol International Partnership announced the availability of the SystemC Transaction Level Monitor Channel version 2.1.2. New features in version 2.1.2 improve model interoperability, resulting in better productivity in system level modeling, according to OCP-IP.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.